參數資料
型號: DS1878T+T&R
廠商: Maxim Integrated Products
文件頁數: 89/101頁
文件大小: 0K
描述: IC CTLR SFP W/DGTL LDD RX 28TQFN
標準包裝: 2,500
類型: SFP+ 控制器
輸入類型: 模擬,數字
輸出類型: 數字
接口: I²C,LDD,串行
電流 - 電源: 2.5mA
安裝類型: 表面貼裝
封裝/外殼: 28-WFQFN 裸露焊盤
供應商設備封裝: 28-TQFN-EP(5x5)
包裝: 帶卷 (TR)
DS1878
SFP+ Controller with Digital LDD Interface
88
______________________________________________________________________________________
Table 02h, Register EDh: IMODMAX
FACTORY DEFAULT
00h
READ ACCESS
PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
WRITE ACCESS
PW2 or (PW1 and RWTBL246)
MEMORY TYPE
Nonvolatile (SEE)
EDh
27
26
25
24
23
22
21
20
BIT 7
BIT 0
A 3-wire slave register. After either VCC exceeds POA (after a POR event), the Maxim laser driver TX_POR bit is set
high (visible in 3W TXSTAT1, Bit 7), or on a rising edge of TXD, this value is written to a Maxim laser driver
through the 3-wire interface.
FACTORY DEFAULT
00h
READ ACCESS
PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
WRITE ACCESS
PW2 or (PW1 and RWTBL246)
MEMORY TYPE
Nonvolatile (SEE)
EEh
27
26
25
24
23
22
21
20
BIT 7
BIT 0
A 3-wire slave register. After either VCC exceeds POA (after a POR event), the Maxim laser driver TX_POR bit is
set high (visible in 3W TXSTAT1, Bit 7) or on a rising edge of TXD, this value is written to a Maxim laser driver
through the 3-wire interface. In addition, this value defines the maximum DAC value allowed for the upper 8 bits
of BIAS output during APC closed-loop operations. During the intial step and binary search, this value does not
cause an alarm but still clamps the BIAS register value. After the startup seqence (or normal APC operations), if
the APC loop tries to create a BIAS value greater than this setting, it is clamped and creates a MAX BIAS alarm.
Table 02h, Register EEh: IBIASMAX
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