參數(shù)資料
型號： DS1878T+T&R
廠商： Maxim Integrated Products
文件頁數(shù)： 79/101頁
文件大小： 0K
描述： IC CTLR SFP W/DGTL LDD RX 28TQFN
標(biāo)準(zhǔn)包裝： 2,500
類型： SFP+ 控制器
輸入類型： 模擬，數(shù)字
輸出類型： 數(shù)字
接口： I²C，LDD，串行
電流 - 電源： 2.5mA
安裝類型： 表面貼裝
封裝/外殼： 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 28-TQFN-EP（5x5）
包裝： 帶卷 (TR)
DS1878
SFP+ Controller with Digital LDD Interface
______________________________________________________________________________________
79
Table 02h, Register C1h: PW_ENB
FACTORY DEFAULT
03h
READ ACCESS
PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
WRITE ACCESS
PW2 or (PW1 and RWTBL246)
MEMORY TYPE
Nonvolatile (SEE)
C1h
RWTBL46
RTBL1C
RTBL2
RTBL1A
RTBL1B
WPW1
WAUXAU
WAUXBU
BIT 7
BIT 0
BIT 7
RWTBL46: Read and Write Tables 04h, 06h
0 = (Default) Read and write access for PW2 only.
1 = Read and write access for both PW1 and PW2.
BIT 6
RTBL1C: Read Table 01h or Table 05h, Registers F8h–FFh. Table address is dependent on MASK
bit (Table 02h, Register 89h).
0 = (Default) Read access for PW2 only.
1 = Read access for PW1 and PW2.
BIT 5
RTBL2: Read Table 02h except for PW1 value locations (Table 02h, Registers B0h–B3h)
0 = (Default) Read access for PW2 only.
1 = Read access for PW1 and PW2.
BIT 4
RTBL1A: Read Table 01h, Registers 80h–BFh
0 = (Default) Read access for PW2 only.
1 = Read access for PW1 and PW2.
BIT 3
RTBL1B: Read Table 01h, Registers C0h–F7h
0 = (Default) Read access for PW2 only.
1 = Read access for PW1 and PW2.
BIT 2
WPW1: Write Register PW1 (Table 02h, Registers B0h–B3h). For security purposes these registers
are not readable.
0 = (Default) Write access for PW2 only.
1 = Write access for PW1 and PW2.
BIT 1
WAUXAU: Write Auxiliary Memory, Registers 00h–7Fh. All users can read this area. Also see
Table 02h, Register C0h, PW_ENA.
0 = Write access for PW2 only.
1 = (Default) Write access for user, PW1 and PW2.
BIT 0
WAUXBU: Write Auxiliary Memory, Registers 80h–FFh. All users can read this area. Also see
Table 02h, Register C0h, PW_ENA.
0 = Read and write access for PW2 only.
1 = (Default) Read and write access for user, PW1 and PW2.
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