參數(shù)資料
型號： DS21Q50N
英文描述： Telecommunication IC
中文描述： 通信集成電路
文件頁數(shù)： 17/99頁
文件大?。?/td> 325K
代理商： DS21Q50N
DS21Q50
Page 17 of 99
5.1.4 PARALLEL PORT CONTROL PINS
Signal Name:
INT*
Signal Description:
Interrupt
Signal Type:
Output
Flags host controller during conditions and change of conditions defined in the Status Registers 1 and 2 and the
HDLC Status Register. Active low, open drain output
Signal Name:
BTS0
Signal Description:
Bus Type Select Bit 0
Signal Type:
Input
Used in conjunction with BTS1 to select between MUX, NON-MUX, serial bus operation and output High Z
mode.
Signal Name:
BTS1
Signal Description:
Bus Type Select Bit 0
Signal Type:
Input
Used in conjunction with BTS0 to select between MUX, NON-MUX, serial bus operation and output High Z
mode.
Signal Name:
TS0
Signal Description:
Transceiver Select Bit 0
Signal Type:
Input
Used in conjunction with FS1 to select one of four Transceivers
Signal Name:
TS1
Signal Description:
Transceiver Select Bit 0
Signal Type:
Input
Used in conjunction with FS0 to select one of four Transceivers
Signal Name:
PBTS
Signal Description:
Parallel Bus Type Select
Signal Type:
Input
Used to select between Motorola and Intel parallel bus types.
Signal Name:
AD0 TO AD7/SDO
Signal Description:
Data Bus or Address/Data Bus[D0 to D6]
Data Bus or Address/Data bus[D7] / Serial Port Output
Signal Type:
Input/Output
In non–multiplexed bus operation (MUX = 0), serves as the data bus. In multiplexed bus operation (MUX = 1),
serves as a 8–bit multiplexed address / data bus.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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