參數(shù)資料
型號： DS21Q50N
英文描述： Telecommunication IC
中文描述： 通信集成電路
文件頁數(shù)： 30/99頁
文件大?。?/td> 325K
代理商： DS21Q50N
DS21Q50
Page 30 of 99
Register Name:
Register Description:
Register Address:
Bit #
SYM
RCUS
SYMBOL
ECUS
CCR2
COMMON CONTROL REGISTER 2
13 Hex
7
6
5
4
3
2
1
0
VCRFS
AAIS
ARA
RSERC LOTCMC
RCLA
TCSS
BIT NAME AND DESCRIPTION
7
Error Counter Update Select.
See Section 9 for details.
0=update error counters once a second
1=update error counters every 62.5 ms (500 frames)
6
VCR Function Select.
See Section 9 for details.
0=count BiPolar Violations (BPVs)
1=count Code Violations (CVs)
5
Automatic AIS Generation.
0=disabled
1=enabled
4
Automatic Remote Alarm Generation.
0=disabled
1=enabled
3
RSER Control.
0=allow RSER to output data as received under all conditions
1=force RSER to one under loss of frame alignment conditions
2
Loss of Transmit Clock Mux Control.
Determines whether the
transmit formatter should switch to the ever present RCLK if the TCLK
should fail to transition (see Figure 4-1).
0=do not switch to RCLK if TCLK stops
1=switch to RCLK if TCLK stops
1
Receive Carrier Loss (RCL) Alternate Criteria.
0=RCL declared upon 255 consecutive zeros (125 us)
1=RCL declared upon 2048 consecutive zeros (1 ms)
0
Transmit Clock Source Select.
This function allows the user to
internally select RCLK as the clock source for the transmit formatter.
0 = Source of transmit clock determined by CCR2.2 (LOTCMC)
1 = Force transmitter to internally switch to RCLK as source of transmit
clock. Signal at TCLK pin is ignored
VCRFS
AAIS
ARA
RSERC
LOTCMC
RCLA
TCSS
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相關代理商/技術參數(shù)
參數(shù)描述
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