參數(shù)資料
型號: DS21Q50N
英文描述: Telecommunication IC
中文描述: 通信集成電路
文件頁數(shù): 40/99頁
文件大?。?/td> 325K
代理商: DS21Q50N
DS21Q50
Page 40 of 99
Register Name:
Register Description:
Register Address:
Bit #
SYM
RSA1
SYMBOL
RSA1
IMR1
INTERRUPT MASK REGISTER 1
18 Hex
7
6
5
4
3
2
1
0
RDMA
RSA0
RSLIP
RUA1
RRA
RCL
RLOS
BIT NAME AND DESCRIPTION
7
Receive Signaling All Ones.
0=interrupt masked
1=interrupt enabled
6
Receive Distant MF Alarm.
0=interrupt masked
1=interrupt enabled
5
Receive Signaling All Zeros.
0=interrupt masked
1=interrupt enabled
4
Receive Elastic Store Slip Occurrence.
0=interrupt masked
1=interrupt enabled
3
Receive Unframed All Ones.
0=interrupt masked
1=interrupt enabled
2
Receive Remote Alarm.
0=interrupt masked
1=interrupt enabled
1
Receive Carrier Loss.
0=interrupt masked
1=interrupt enabled
0
Receive Loss of Sync.
0=interrupt masked
1=interrupt enabled
RDMA
RSA0
RSLIP
RUA1
RRA
RCL
RLOS
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