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參數(shù)資料
| 型號(hào)： | DS21Q50N |
| 英文描述： | Telecommunication IC |
| 中文描述： | 通信集成電路 |
| 文件頁(yè)數(shù)： | 33/99頁(yè) |
| 文件大小： | 325K |
| 代理商： | DS21Q50N |
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DS21Q50
Page 33 of 99
Register Name:
Register Description:
Register Address:
Bit #
SYM
LIRST
SYMBOL
LIRST
CCR4
COMMON CONTROL REGISTER 4
15 Hex
7
6
5
4
3
2
1
0
RESA
RESR
RCM4
RCM3
RCM2
RCM1
RCM0
BIT NAME AND DESCRIPTION
7
Line Interface Reset.
Setting this bit from a zero to a one will initiate
an internal reset that affects the clock recovery state machine and jitter
attenuator. Normally this bit is only toggled on power–up. Must be
cleared and set again for a subsequent reset.
6
Receive Elastic Store Align.
Setting this bit from a zero to a one may
force the receive elastic store’s write/read pointers to a minim separation
of half a frame. No action will be taken if the pointer separation is
already greater or equal to half a frame. If pointer separation is less then
half a frame, the command will be executed and data will be disrupted.
Should be toggled after SYSCLK has been applied and is stable. Must
be cleared and set again for a subsequent align. See Section 16 for
details.
5
Receive Elastic Store Reset.
Setting this bit from a zero to a one will
force the receive elastic store to a depth of one frame. Receive data is
lost during the reset. Should be toggled after SYSCLK has been applied
and is stable. Must be cleared and set again for a subsequent reset. See
Section 16 for details.
4
Receive Channel Monitor Bit 4.
MSB of a channel decode that
determines which receive channel data will appear in the RDS0M
register. See Section 9 for details.
3
Receive Channel Monitor Bit 3.
2
Receive Channel Monitor Bit 2.
1
Receive Channel Monitor Bit 1.
0
Receive Channel Monitor Bit 0.
LSB of the channel decode.
RESA
RESR
RCM4
RCM3
RCM2
RCM1
RCM0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS21Q55DK | Quad T1/E1/J1 Transceiver Design Kit Daughter Card |
| DS21Q55 | Quad T1/E1/J1 Transceiver |
| DS21Q55N | Quad T1/E1/J1 Transceiver |
| DS21S07A | SCSI Terminator |
| DS21S07AE | Terminator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21Q55 | 功能描述:IC TXRX QUAD T1/E1/J1 SCT 256BGA RoHS:否 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
| DS21Q552 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad T1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q552+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 5V Quad T1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q552B | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| DS21Q552BN | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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