參數(shù)資料
型號: DS21Q59DK
廠商: Maxim Integrated Products
文件頁數(shù): 24/76頁
文件大小: 0K
描述: KIT DESIGN FOR DS21Q59
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
主要目的: 電信,調幀器和線路接口裝置(LIU)
已用 IC / 零件: DS21Q59
DS21Q59 Quad E1 Transceiver
30 of 76
Register Name:
SR1
Register Description:
Status Register 1
Register Address:
0A Hex
Bit #
7
6
5
4
3
2
1
0
Name
RSA1
RDMA
RSA0
RSLIP
RUA1
RRA
RCL
RLOS
NAME
BIT
FUNCTION
RSA1
7
Receive Signaling All Ones. Set when the contents of time slot 16 contains fewer
than three zeros over 16 consecutive frames. This alarm is not disabled in the
CCS signaling mode. Both RSA1 and RSA0 are set if a change in signaling is
detected.
RDMA
6
Receive Distant MF Alarm. Set when bit 6 of time slot 16 in frame 0 has been set
for two consecutive multiframes. This alarm is not disabled in the CCS signaling
mode.
RSA0
5
Receive Signaling All Zeros. Set when over a full MF, time slot 16 contains all
zeros. Both RSA1 and RSA0 are set if a change in signaling is detected.
RSLIP
4
Receive Elastic Store Slip. Set when the elastic store has either repeated or
deleted a frame of data.
RUA1
3
Receive Unframed All Ones. Set when an unframed all-ones code is received at
RPOSI and RNEGI.
RRA
2
Receive Remote Alarm. Set when a remote alarm is received at RPOSI and
RNEGI.
RCL
1
Receive Carrier Loss. Set when 255 (or 2048 if CCR2.1 = 1) consecutive zeros
have been detected at RTIP and RRING. (Note: A receiver carrier loss based on
data received at RPOSI and RNEGI is available in the HSR register.)
RLOS
0
Receive Loss of Sync. Set when the device is not synchronized to the receive E1
stream.
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