參數(shù)資料
型號： DS21Q59DK
廠商： Maxim Integrated Products
文件頁數(shù)： 40/76頁
文件大?。?/td> 0K
描述： KIT DESIGN FOR DS21Q59
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
主要目的： 電信，調(diào)幀器和線路接口裝置（LIU）
已用 IC / 零件： DS21Q59
DS21Q59 Quad E1 Transceiver
45 of 76
20.
USER-CONFIGURABLE OUTPUTS
There are two user-configurable output pins for each transceiver, OUTA and OUTB. These pins can be
programmed to output various clocks, alarms for line monitoring, or logic 0 and 1 levels to control external circuitry.
They can also be used to access transmit data between the framer and transmit LIU. OUTA and OUTB can be
active low or active high when operating as clock and alarm outputs. OUTA is active high if OUTAC.4 = 1 and
active low if OUTAC.3 = 0. OUTB is active high if OUTBC.4 = 1 and active low if OUTBC.4 = 0 (Table 20-A). Select
mode 0000 to control external circuitry. In this configuration, the OUTA pin follows OUTAC.4 and the OUTB pin
follows OUTBC.4. The OUTAC register also contains a control bit for CMI operation. See Section 22 for details
about CMI operation.
Register Name:
OUTAC
Register Description:
OUTA Control Register
Register Address:
1A Hex
Bit #
7
6
5
4
3
2
1
0
Name
TTLIE
CMII
CMIE
OA4
OA3
OA2
OA1
OA0
NAME
BIT
FUNCTION
TTLIE
7
TTL Input Enable. When this bit is set, the receiver can accept TTL
positive and negative data at the RTIP and RRING inputs. The data is
clocked in on the falling edge of MCLK.
CMII
6
CMI Invert. See Section 22 for details.
0 = CMI input data not inverted
1 = CMI input data inverted
CMIE
5
CMI Enable. See Section 22 for details.
0 = CMI disabled
1 = CMI enabled
OA4
4
OUTA Control Bit 4. Inverts OUTA output.
OA3
3
OUTA Control Bit 3. See Table 20-A for details.
OA2
2
OUTA Control Bit 2. See Table 20-A for details.
OA1
1
OUTA Control Bit 1. See Table 20-A for details.
OA0
0
OUTA Control Bit 0. See Table 20-A for details.
Register Name:
OUTBC
Register Description:
OUTB Control Register
Register Address:
1B Hex
Bit #
7
6
5
4
3
2
1
0
Name
NRZE
—
OB4
OB3
OB2
OB1
OB0
NAME
BIT
FUNCTION
NRZE
7
NRZ Enable. When this bit is set, the receiver can accept TTL-type NRZ
data at the RTIP input. RRING becomes a clock input.
0 = RTIP and RRING are in normal mode.
1 = RTIP becomes an NRZ TTL-type input and RRING is its associated
clock input. Data at RTIP is clocked in on the falling edge of the clock
present on RRING.
—
6
Unused. Should be set = 0 for proper operation.
—
5
Unused. Should be set = 0 for proper operation.
OB4
4
OUTB Control Bit 4. Inverts OUTB output.
OB3
3
OUTB Control Bit 3
OB2
2
OUTB Control Bit 2
OB1
1
OUTB Control Bit 1
OB0
0
OUTB Control Bit 0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS21Q59L 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21Q59L+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21Q59LN 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21Q59LN+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS21S07A 制造商:Maxim Integrated Products 功能描述:
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