Arbitration Bus " />
參數(shù)資料
型號: DSP56303VL100B1
廠商: Freescale Semiconductor
文件頁數(shù): 50/108頁
文件大?。?/td> 0K
描述: IC DSP 24BIT 100MHZ 196-BGA
標(biāo)準(zhǔn)包裝: 630
系列: DSP563xx
類型: 定點
接口: 主機接口,SSI,SCI
時鐘速率: 100MHz
非易失內(nèi)存: ROM(576 B)
芯片上RAM: 24kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 3.30V
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 196-LBGA
供應(yīng)商設(shè)備封裝: 196-MAPBGA(15x15)
包裝: 托盤
DSP56303 Technical Data, Rev. 11
2-26
Freescale Semiconductor
Specifications
2.5.5.4 Arbitration Timings
Table 2-14.
Arbitration Bus Timings1
No.
Characteristics
Expression2
100 MHz
Unit
Min
Max
212
CLKOUT high to BR assertion/deassertion3
0.0
4.0
ns
213
BG asserted/deasserted to CLKOUT high (setup)
4.0
ns
214
CLKOUT high to BG deasserted/asserted (hold)
0.0
ns
215
BB deassertion to CLKOUT high (input set-up)
4.0
ns
216
CLKOUT high to BB assertion (input hold)
0.0
ns
217
CLKOUT high to BB assertion (output)
0.0
4.0
ns
218
CLKOUT high to BB deassertion (output)
0.0
4.0
ns
219
BB high to BB high impedance (output)
4.5
ns
220
CLKOUT high to address and controls active
0.25
× TC
2.5
ns
221
CLKOUT high to address and controls high impedance
0.75
× T
C
—7.5
ns
222
CLKOUT high to AA active
0.25
× TC
2.5
ns
223
CLKOUT high to AA deassertion
maximum: 0.25
× TC + 4.0
2.0
6.5
ns
224
CLKOUT high to AA high impedance
0.75
× T
C
—7.5
ns
Notes:
1.
Synchronous bus arbitration is not recommended. Use Asynchronous mode whenever possible.
2.
An expression is used to compute the maximum or minimum value listed, as appropriate. For timing 223, the minimum is an
absolute value.
3.
T212 is valid for Address Trace mode when the ATE bit in the Operating Mode Register is set. BR is deasserted for internal
accesses and asserted for external accesses.
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