參數(shù)資料
型號: DSPIC30F6010-20E/PF
廠商: Microchip Technology
文件頁數(shù): 63/110頁
文件大小: 0K
描述: IC DSPIC MCU/DSP 144K 80TQFP
產(chǎn)品培訓模塊: Asynchronous Stimulus
標準包裝: 90
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: CAN,I²C,SPI,UART/USART
外圍設備: 高級欠壓探測/復位,LVD,電機控制 PWM,QEI,POR,PWM,WDT
輸入/輸出數(shù): 68
程序存儲器容量: 144KB(48K x 24)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 80-TQFP
包裝: 托盤
配用: DM300019-ND - BOARD DEMO DSPICDEM 80L STARTER
AC164314-ND - MODULE SKT FOR PM3 80PF
DM300020-ND - BOARD DEV DSPICDEM MC1 MOTORCTRL
其它名稱: DSPIC30F601020EPF
dsPIC30F6010
DS70119E-page 54
2006 Microchip Technology Inc.
FIGURE 8-2:
BLOCK DIAGRAM OF A SHARED PORT STRUCTURE
8.2
Configuring Analog Port Pins
The use of the ADPCFG and TRIS registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their correspond-
ing TRIS bit set (input). If the TRIS bit is cleared
(output), the digital output level (VOH or VOL) will be
converted.
When reading the PORT register, all pins configured as
analog input channel will read as cleared (a low level).
Pins configured as digital inputs will not convert an ana-
log input. Analog levels on any pin that is defined as a
digital input (including the ANx pins), may cause the
input buffer to consume current that exceeds the
device specifications.
8.2.1
I/O PORT WRITE/READ TIMING
One instruction cycle is required between a port
direction change or port write operation and a read
operation of the same port. Typically this instruction
would be a NOP.
EXAMPLE 8-1:
PORT WRITE/READ
EXAMPLE
Q
D
CK
WR LAT +
TRIS Latch
I/O Pad
WR Port
Data Bus
Q
D
CK
Data Latch
Read LAT
Read Port
Read TRIS
1
0
1
0
WR TRIS
Peripheral Output Data
Output Enable
Peripheral Input Data
I/O Cell
Peripheral Module
Peripheral Output Enable
PIO Module
Output Multiplexers
Output Data
Input Data
Peripheral Module Enable
MOV 0xFF00, W0; Configure PORTB<15:8>
; as inputs
MOV W0, TRISBB; and PORTB<7:0> as outputs
NOP
; Delay 1 cycle
btssPORTB, #13; Next Instruction
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