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您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄19323 > EP2S30F672I4N (Altera)IC STRATIX II FPGA 30K 672-FBGA PDF資料下載

型號(hào)：	EP2S30F672I4N
廠商：	Altera
文件頁(yè)數(shù)：	533/768頁(yè)
文件大小：	0K
描述：	IC STRATIX II FPGA 30K 672-FBGA
產(chǎn)品培訓(xùn)模塊：	Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝：	10
系列：	Stratix® II
LAB/CLB數(shù)：	1694
邏輯元件/單元數(shù)：	33880
RAM 位總計(jì)：	1369728
輸入/輸出數(shù)：	500
電源電壓：	1.15 V ~ 1.25 V
安裝類(lèi)型：	表面貼裝
工作溫度：	-40°C ~ 100°C
封裝/外殼：	672-BBGA
供應(yīng)商設(shè)備封裝：	672-BGA（27x27）
其它名稱(chēng)：	544-1900 EP2S30F672I4N-ND

Altera Corporation

January 2008

Stratix II Device Handbook, Volume 2

Configuring Stratix II and Stratix II GX Devices

Figure 7–8. Single Device FPP Configuration Using an Enhanced Configuration

Notes to Figure 7–8:

The pull-up resistor should be connected to the same supply voltage as the

configuration device.

The nINIT_CONF pin is available on enhanced configuration devices and has an

internal pull-up resistor that is always active. This means an external pull-up

resistor should not be used on the nINIT_CONF-nCONFIG line. The nINIT_CONF

pin does not need to be connected if its functionality is not used. If nINIT_CONF

is not used, nCONFIG must be pulled to VCC either directly or through a resistor.

The enhanced configuration devices’ OE and nCS pins have internal

programmable pull-up resistors. If internal pull-up resistors are used, external

pull-up resistors should not be used on these pins. The internal pull-up resistors

are used by default in the Quartus II software. To turn off the internal pull-up

resistors, check the Disable nCS and OE pull-ups on configuration device option

when generating programming files.

The value of the internal pull-up resistors on the enhanced configuration

devices can be found in the Enhanced Configuration Devices (EPC4, EPC8

& EPC16) Data Sheet in volume 2 of the Configuration Handbook.

When using enhanced configuration devices, you can connect the

device’s nCONFIG pin to nINIT_CONF pin of the enhanced configuration

device, which allows the INIT_CONF JTAG instruction to initiate device

configuration. The nINIT_CONF pin does not need to be connected if its

functionality is not used. If nINIT_CONF is not used, nCONFIG must be

pulled to VCC either directly or through a resistor. An internal pull-up

resistor on the nINIT_CONF pin is always active in the enhanced

configuration devices, which means an external pull-up resistor should

not be used if nCONFIG is tied to nINIT_CONF.

Upon power-up, the Stratix II or Stratix II GX device goes through a POR.

The POR delay is dependent on the PORSEL pin setting; when PORSEL is

driven low, the POR time is approximately 100 ms, if PORSEL is driven

high, the POR time is approximately 12 ms. During POR, the device will

reset, hold nSTATUS low, and tri-state all user I/O pins. The

Stratix II Device

Configuration

nINIT_CONF (2)

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