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參數(shù)資料
| 型號： | GT-48212 |
| 廠商： | Galileo Technology Services, LLC |
| 英文描述： | Advanced Switched Ethernet Controllers for 10+10/100 BaseX(高級交換式 10+10/100 BaseX以太網(wǎng)控制器) |
| 中文描述： | 先進(jìn)的交換式以太網(wǎng)控制器的10 10/100 BaseX（高級交換式10 10/100 BaseX以太網(wǎng)控制器） |
| 文件頁數(shù)： | 57/135頁 |
| 文件大?。?/td> | 1619K |
| 代理商： | GT-48212 |
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GT-482xx Switched Ethernet Controllers for 10+10/100 BaseX
GALI
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TECHNOLOGY
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DO
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Revision 1.2
The GT-482xx does not modify the Address Table and sends a New_Address message only to the CPU. The GT-
482xx decides whether to discard or forward the packet based on the DisLock bit in the Global Control register. If
this bit is reset, then packets received from new SA on a locked port are discarded.
The CPU can also prevent sending unknown packets to this port. This is done by setting the ForUnk bit in the Port
Control Register.
Note: In Locked Port mode, a station that moved to a new port receives a New Address, therefore, packets com-
ing from the station that moved are discarded until the CPU reprograms the GT-482xx with the new port number.
6.4.1
Port-Based VLAN Support
The user can implement port-based VLANs using the GT-482xx for both one chip and two chip configurations
using the locked-port feature:
The CPU programs all ports as locked ports.
The GT-482xx sends New_Address messages only to the CPU.
The CPU sends the forward mask for each source address (that is legal for that port) back to the GT-
482xx.
VLANs that span ports in two-chip GT-482xx configurations can be defined. Since all ports are locked ports, the
GT-482xx checks the forwarding “l(fā)egality” from source to destination, and assures security.
The user can define port-based VLANs with common ports and still maintain security. For more information see
Section 6.6 "Address Recognition". The user can optionally define the forwarding masks to represent port-based
VLANs that do not share ports.
6.5
Address Entry Update and Query from CPU
This interface is used to receive New_Address messages from the CPU. The messages can be new Address
Table entries, updates to existing ones, or queries from the CPU. The query from the CPU is a mechanism in
which the CPU can read the data from the Address Table. The GT-482xx responds by searching the Address
Table for the requested MAC address, and returns the result to the CPU in the QUERY Register.
To perform these tasks the GT-482xx maintains three 32-bit registers called NA_From_CPU registers. These
three 32-bit registers are written by the CPU to update the GT-482xx with a new/modified address entry, or with a
query message
CPU initiates a Query by sending a New_Address message with a Query bit set. The GT-482xx responds by
searching the Address Table for the entry and places the address information in the QUERY register. The GT-
482xx then generates an interrupt.
6.6
Address Recognition
The GT-482xx forwards incoming packets to their appropriate port(s) according to the Destination Address (DA),
and Source Address (SA) in the Address Table and the programming modes of each port’s Port Control register
(PCR) and Global Control register (GCR) as follows:
1.
The following principles are always valid:
A packet is not forwarded to any port if the port is disabled, link is down, or in span-mode (Except BPDU
to a span port).
A packet is never forwarded on the port from which it was received.
If GCR.DisPktLock =0 then any received packet (Unicast or Multicast) from a port that has
PCR.Locked=1, with a new SA (or SA that moved to this port), the packet is discarded, regardless of the
DA.
2.
Otherwise, the forwarding of a packet received on any of the 14 ports can be Unicast or Multicast Desti-
nation Addresses as follows:
2.1
Unicast Destination Address:
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