參數(shù)資料
型號(hào)： HC05J5AGRS
英文描述： 68HC(7)05J5A General Release Specification
中文描述： 68HC（7）05J5A總發(fā)行規(guī)格
文件頁(yè)數(shù)： 68/106頁(yè)
文件大?。?/td> 1366K
代理商： HC05J5AGRS
GENERAL RELEASE SPECIFICATION
July 16, 1999
MOTOROLA
9-10
16-BIT TIMER
MC68HC05J5A
REV 2.1
time the counter resumes from its stopped value as if nothing had happened. If
STOP mode is exited via an external reset (logic low applied to the RESET pin)
the counter is forced to $FFFC.
If a valid input capture edge occurs at the PB0/TCAP pin during the STOP mode
the input capture detect circuitry will be armed. This action does not set any flags
or “wake up” the MCU, but when the MCU does “wake up” there will be an active
input capture flag (and data) from the first valid edge. If the STOP mode is exited
by an external reset, no input capture flag or data will be present even if a valid
input capture edge was detected during the STOP mode.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
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相關(guān)代理商/技術(shù)參數(shù)
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HC05J5GRS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:68HC05J5 General Release Specification
HC05JB3GRS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:68HC05JB3 and 68HC705JB3 General Release Specification
HC05JB4GRS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:68HC(7)05JB4 General Release Specification
HC05JJ6GRS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:68HC05JJ6 and 68HC05JP6 General Release Specification
HC05K3GRS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:68HC05K3 General Release Specification
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