參數(shù)資料
型號(hào)： HMT351V7BFR8C-H9
廠(chǎng)商： HYNIX SEMICONDUCTOR INC
元件分類(lèi)： DRAM
英文描述： DDR DRAM MODULE, DMA240
封裝： ROHS COMPLIANT, DIMM-240
文件頁(yè)數(shù)： 24/61頁(yè)
文件大?。?/td> 1050K
代理商： HMT351V7BFR8C-H9
Rev. 0.1 / Feb. 2010
30
AC & DC Output Measurement Levels
Single Ended AC and DC Output Levels
Table below shows the output levels used for measurements of single ended signals.
Notes:
1. The swing of
1 x VDDQ is based on approximately 50% of the static single ended output high or low
swing with a driver impedance of 40
and an effective test load of 25
to VTT = VDDQ / 2.
Differential AC and DC Output Levels
Table below shows the output levels used for measurements of single ended signals.
Notes:
1. The swing of
x VDDQ is based on approximately 50% of the static differential output high or low
swing with a driver impedance of 40
and an effective test load of 25
to VTT = VDDQ/2 at each of the
differential outputs.
Single-ended AC and DC Output Levels
Symbol
Parameter
DDR3-800, 1066,
1333
Unit
Notes
VOH(DC)
DC output high measurement level (for IV curve linearity)
0.8 x VDDQ
V
VOM(DC)
DC output mid measurement level (for IV curve linearity)
0.5 x VDDQ
V
VOL(DC)
DC output low measurement level (for IV curve linearity)
0.2 x VDDQ
V
VOH(AC)
AC output high measurement level (for output SR)
VTT + 0.1 x VDDQ
V1
VOL(AC)
AC output low measurement level (for output SR)
VTT - 0.1 x VDDQ
V1
Differential AC and DC Output Levels
Symbol
Parameter
DDR3-800, 1066,
1333
Unit
Notes
VOHdiff (AC) AC differential output high measurement level (for output SR)
+ 0.2 x VDDQ
V1
VOLdiff (AC) AC differential output low measurement level (for output SR)
- 0.2 x VDDQ
V1
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