參數(shù)資料
型號: HYB18L128160BF
廠商: QIMONDA
英文描述: DRAMs for Mobile Applications 128-Mbit Mobile-RAM
中文描述: 針對移動(dòng)應(yīng)用的DRAM 128 - Mbit的移動(dòng)RAM
文件頁數(shù): 47/55頁
文件大?。?/td> 1399K
代理商: HYB18L128160BF
Data Sheet
47
Rev. 1.71, 2007-01
05282004-NZNK-8T0D
HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
Electrical CharacteristicsAC Characteristics
Figure 47
Test Load for DQ Pins
WRITE recovery time
PRECHARGE command period
Refresh period (4096 rows)
Self refresh exit time
1) 0
°
C
T
C
70
°
C (comm.); -25
°
C
T
C
85
°
C (ext.); V
DD
= V
DDQ
= 1.70V to 1.95V;
2) All parameters assumes proper device initialization.
3) AC timing tests measured at 0.9 V.
4) The transition time is measured between V
IH
and V
IL
; all AC characteristics assume t
T
= 1 ns.
5) Specified t
AC
and t
OH
parameters are measured with a 30 pF capacitive load only as shown in
Figure 47
.
6) If t
T
(CLK) > 1 ns, a value of (t
T
/2 - 0.5) ns has to be added to this parameter.
7) If t
T
> 1 ns, a value of [0.5 x (t
T
- 1)] ns has to be added to this parameter.
8) These parameter account for the number of clock cycles and depend on the operating frequency, as follows:
no. of clock cycles = specified delay / clock period; round up to next integer.
9) The write recovery time of t
WR
= 14 ns allows the use of one clock cycle for the write recovery time when f
CK
72 MHz.
With f
CK
> 72 MHz two clock cycles for t
WR
are mandatory. Qimonda recommends to use two clock cycles for the write
recovery time in all applications.
t
WR
t
RP
t
REF
t
SREX
14
19
1
64
ns
ns
ms
t
CK
9)
Table 21
Parameter
AC Characteristics
1)2)3)4)
(cont’d)
Symbol
- 7.5
Unit
Notes
min.
max.
P&
) /
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