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參數(shù)資料
| 型號： | HYB18T256400AF |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 256 Mbi t DDR2 SDRAM |
| 中文描述： | 256姆噸DDR2內(nèi)存 |
| 文件頁數(shù)： | 51/90頁 |
| 文件大?。?/td> | 1246K |
| 代理商： | HYB18T256400AF |
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HYB18T256400/800/160AF
256Mb DDR2 SDRAM
INFINEON Technologies
Page 51 Rev. 1.02 May 2004
2.8.3 Read or Write to Precharge Command Spacing Summary
The following table summarizes the minimum command delays between Read, Read w/AP, Write, Write w/AP to
the Precharge commands to the same banks and Precharge-All commands.
Burst Write with Auto-Precharge (WR + tRP Limit): WL = 4, tDAL = 6 (WR = 3, tRP = 3), BL = 4
From Command
To Command
Minimum Delay between “From
Command” to “To Command”
Units
Notes
READ
PRECHARGE (to same banks as READ)
AL + BL/2 + max(tRTP, 2) - 2*tck
tCK
1, 2
PRECHARGE-ALL
AL + BL/2 + max(tRTP, 2) - 2*tck
tCK
1, 2
READ w/AP
PRECHARGE (to same banks as READ w/AP)
AL + BL/2 + max(tRTP, 2) - 2*tck
tCK
1, 2
PRECHARGE-ALL
AL + BL/2 + max(tRTP, 2) - 2*tck
tCK
1, 2
WRITE
PRECHARGE (to same banks as WRITE)
WL + BL/2 + tWR
tCK
2
PRECHARGE-ALL
WL + BL/2 + tWR
tCK
2
WRITE w/AP
PRECHARGE (to same banks as WRITE w/AP)
WL + BL/2 + WR
tCK
2
PRECHARGE-ALL
WL + BL/2 + WR
tCK
2
PRECHARGE
PRECHARGE (to same banks as PRECHARGE)
1*tck
tCK
2
PRECHARGE-ALL
1*tck
tCK
2
PRECHARGE-ALL
PRECHARGE
1*tck
tCK
2
PRECHARGE-ALL
1*tck
tCK
2
Note 1: RTP[cycles] = RU{tRTP(ns) / tCK(ns)}, where RU stands for round up.
Note 2: For a given bank, the precharge period should be counted from the latest precharge command, either one bank precharge or
precharge-all, issued to that bank. The precharge period is satisfied after tRP or tRPall depending on the latest prechargte com-
mand issued to that bank
NOP
NOP
NOP
NOP
NOP
Bank A
Activate
NOP
W RITE w/AP
Posted CAS
T0
T3
T4
T5
T6
T7
T12
NOP
CMD
DQ
BW-AP423
A10 ="high"
tRP
Auto-Precharge Begins
DIN A0 DIN A1 DIN A2 DIN A3
WL = RL-1 = 4
WR
>=tRC
T9
T8
Completion of the Burst Write
DQS,
DQS
tDAL
>=tRAS
CK, CK
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HYB18T256400AF-3.7 | 制造商:Infineon Technologies AG 功能描述:64M X 4 DDR DRAM, 0.5 ns, PBGA60 |
| HYB18T256400AF-5 | 制造商:Infineon Technologies AG 功能描述:SDRAM, DDR, 64M x 4, 60 Pin, Plastic, BGA |
| HYB18T256800AF-5 | 制造商:Infineon Technologies AG 功能描述: |
| HYB18T512161BF-25 | 制造商:Qimonda 功能描述:SDRAM, DDR, 32M x 16, 84 Pin, Plastic, BGA |
| HYB18T512400AF-5 | 制造商:Intersil Corporation 功能描述:SDRAM, DDR, 128M x 4, 60 Pin, Plastic, BGA |
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