參數(shù)資料
型號: HYB3166165BT-40
廠商: SIEMENS A G
元件分類: DRAM
英文描述: 4M x 16-Bit Dynamic RAM
中文描述: 4M X 16 EDO DRAM, 40 ns, PDSO50
封裝: 0.400 INCH, PLASTIC, TSOP2-50
文件頁數(shù): 9/29頁
文件大?。?/td> 284K
代理商: HYB3166165BT-40
Semiconductor Group
9
HYB3164(5/6)165AT(L)-40/-50/-60
4M x 16 EDO-DRAM
DC-Characteristics (cont’d)
T
A
= 0 to 70 °C,
V
SS
= 0 V,
V
CC
= 3.3 V
±
0.3 V
Parameter
Symbol
refresh version
Unit Note
2k
4k
8k
Operating Current
-40 ns version
-50 ns version
- -60 ns version
(RAS, CAS, address cycling: tRC = tRC min.)
I
CC1
280
230
185
170
140
115
125
100
85
mA
mA
mA
2) 3)
4)
Standby Current (
RAS
=
CAS
=
Vih
)
I
CC2
I
CC3
2
2
2
mA
RAS Only Refresh Current:
- -40 ns version
-50 ns version
-60 ns version
(RAS cycling: CAS = VIH: tRC = tRC min.)
Hyper Page Mode (EDO) Current:
-40 ns version
-50 ns version
-60 ns version
(RAS =
V
IL
, CAS, address cycling: tHPC=tHPC min.)
Standby Current (
RAS
=
CAS
=
Vcc-0.2V
)
Standby Current (L-Version)
(RAS=CAS= Vcc-0.2V)
280
230
185
170
140
115
125
100
84
mA
mA
mA
2) 4)
I
CC4
140
105
85
140
105
85
140
105
85
mA
mA
mA
2) 3)
4)
I
CC5
I
CC5
900
900
900
μ
A
μ
A
200
200
200
CAS Before RAS Refresh Current
-40 ns version
-50 ns version
-60 ns version
(RAS, CAS cycling: tRC = tRC min.)
I
CC6
280
230
185
170
140
115
170
140
115
mA
mA
mA
2) 4)
Self Refresh Current (L-version only)
(CBR cycle with tRAS>TRASSmin, CAS held low,
WE = Vcc-0.2V, Address and Din=Vcc-0.2V or 0.2V)
I
CC7
400
400
400
μ
A
Capacitance
T
A
= 0 to 70 °C,
V
CC
= 3.3 V
±
0.3 V,
f
= 1 MHz
Parameter
Symbol
Limit Values
Unit
min.
max.
Input capacitance (A0 to A11,A12)
C
I1
C
I2
C
IO
5
pF
Input capacitance (RAS, CAS, WE, OE)
7
pF
I/O capacitance (I/O1-I/O16)
7
pF
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