參數(shù)資料
型號: IDTSSTE32882HLBAKG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 60/73頁
文件大小: 0K
描述: IC REGISTERING CLK DRIVER 176BGA
標(biāo)準(zhǔn)包裝: 170
類型: 時(shí)鐘緩沖器/驅(qū)動(dòng)器,多路復(fù)用器
PLL:
主要目的: 存儲(chǔ)器,DDR3,RDIMM
輸入: CMOS
輸出: CMOS
電路數(shù): 1
比率 - 輸入:輸出: 5:60
差分 - 輸入:輸出: 是/是
頻率 - 最大: 810MHz
電源電壓: 1.282 V ~ 1.575 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 176-TFBGA
供應(yīng)商設(shè)備封裝: 176-CABGA(13.5x8)
包裝: 托盤
1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
63
SSTE32882HLB
7201/14
SSTE32882HLB
1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
COMMERCIAL TEMPERATURE
RC9: Power Saving Settings Control Word
The SSTE32882HLB features a weak drive mode, which is a variant of the floating mode set in RC0. If Bit DA4 of RC0 is set
to ‘1’, then Bit DA3 of RC9 selects between floating mode and weak drive mode.
The SSTE32882HLB register supports different power down modes. By default, the Power Down feature is disabled
(RC9[DBA1]=0). The register ignores CKE Power Down mode setting when this function is disabled. If the CKE Power
Down mode is enabled (RC9[DBA1]=1), then power down is invoked once both DCKE0 and DCKE1 are low. Bit DBA0
selects how IBT and ODT behaves.
RC10: Encoding for RDIMM Operating Speed
The encoding value is used to inform the register the operating speed that it is being run at in a system. It is not an indicator of how fast
or slow a register can run
Input
Definition
Encoding
DBA1
DBA0
DA4
DA3
xx
x
0
Weak Drive Mode
Floating
xx
x
1
Typical weak drive enabled1
Weak Driver Impedance:
70
(min), 100 (nom), 120 (min)
1
To get optimum power saving while keeping the VIL DC (max) limit for SDRAM, the Weak Drive Mode Impedance
should be 70 (min), 100 (nom), 120 (min).
xx
0
x
Reserved
xx
1
x
Reserved
10
x
CKE Power Down Mode
CKE power down with IBT ON, QxODT is a function
of DxODT
1
x
CKE power down with IBT off, QxODT held LOW
0x
x
CKE Power Down Mode
Enable
Disabled
1x
x
Enabled
Input
Definition
Encoding
DBA1
DBA0
DA4
DA3
x000
f < 800 MTS
DDR3-800 (default)
x001
800 MTS < f < 1066 MTS
DDR3-1066
x010
1066 MTS < f < 1333 MTS
DDR3-1333
x011
1333 MTS < f < 1600 MTS
DDR3-1600
x100
Reserved
x101
Reserved
x110
Reserved
x111
Reserved
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