參數(shù)資料
型號: IS43R16800A1-5TL
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 8Meg x 16 128-MBIT DDR SDRAM
中文描述: 8M X 16 DDR DRAM, 0.65 ns, PDSO66
封裝: LEAD FREE, PLASTIC, TSOP2-66
文件頁數(shù): 56/72頁
文件大小: 2174K
代理商: IS43R16800A1-5TL
56
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. 00A
04/17/06
ISSI
IS43R16800A1
t
IH
Address and control input hold time
(slow slew rate)
1.0
0.8
0.7
0.7
ns
2-4, 10,
11, 12, 14
t
IS
Address and control input setup time
(slow slew rate)
1.0
0.8
0.7
0.6
ns
2-4, 10,
11, 12, 14
t
RPRE
Read preamble
0.9
1.1
0.9
1.1
0.9
1.1
0.9
1.1
t
CK
1-4
t
RPST
Read postamble
0.40
0.60
0.40
0.60
0.40
0.60
0.40
0.60
t
CK
1-4
t
RAS
Active to Precharge command
45
120,0
00
42
120,0
00
40
120,0
00
40
120,0
00
ns
1-4
t
RC
Active to Active/Auto-refresh command period
65
60
60
60
ns
1-4
t
RFC
Auto-refresh to Active/Auto-refresh command
period
12
12
13
15
t
CK
1-4
t
RCD
Active to Read or Write delay
3
3
3
4
t
CK
1-4
t
RAP
Active to Read Command with Autoprecharge
3
3
3
4
t
CK
1-4
t
RP
Precharge command period
3
3
3
3
t
CK
1-4
t
RRD
Active bank A to Active bank B command
2
2
2
3
t
CK
1-4
t
WR
Write recovery time
3
3
3
3
t
CK
1-4
t
DAL
Auto precharge write recovery + precharge time
(t
WR
/t
CK
)
+
(t
RP
/t
C
K
)
(t
WR
/t
CK
)
+
(t
RP
/t
C
K
)
(t
WR
/t
CK
)
+
(t
RP
/t
C
K
)
(t
WR
/t
CK
)
+
(t
RP
/t
C
K
)
t
CK
1-4, 13
t
WTR
Internal write to read command delay
1
1
1
2
t
CK
1-4
t
PDEX
Power down exit time
7.5
6
5
5
ns
1-4
t
XSNR
Exit self-refresh to non-read command
13
13
10
10
t
CK
1-4
t
XSRD
Exit self-refresh to read command
200
200
200
200
t
CK
1-4
t
REFI
Average Periodic Refresh Interval
7.8
7.8
7.8
7.8
μ
s
1-4, 8
1. Input slew rate = 1V/ns
2. The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross: the input reference level for sig-
nals other than CK/CK, is V
REF.
3. Inputs are not recognized as valid until V
REF
stabilizes.
4. The Output timing reference level, as measured at the timing reference point indicated in AC Characteristics (Note 3) is V
TT
.
5. t
HZ
and t
LZ
transitions occur in the same access time windows as valid data transitions. These parameters are not referred to a specific
voltage level, but specify when the device is no longer driving (HZ), or begins driving (LZ).
Electrical Characteristics & AC Timing - Absolute Specifications
(0 °C
T
A
70
°
C
;
V
DD
= V
DDQ
= 2.5V
±
0.2V (
-
6/
-
75); V
DD
= V
DDQ
= 2.6V
±
0.1V (
-
5/
-
43), See AC Characteristics) (Part 2 of
2)
Symbol
Parameter
DDR266
-
75
DDR333
-
6
DDR400
-
5
DDR466
-
43
Unit
Notes
Min
Max
Min
Max
Min
Max
Min
Max
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IS43R16800A-6 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:8Meg x 16 128-MBIT DDR SDRAM