參數(shù)資料
型號: ISP1161A1BM,557
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù): 33/137頁
文件大?。?/td> 599K
代理商: ISP1161A1BM,557
Philips Semiconductors
ISP1161A1
USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
127 of 136
9397 750 13961
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
21.2 Interfacing a ISP1161A1 with a SH7709 RISC processor
This section shows a typical interface circuit between the ISP1161A1 and a RISC
processor. The Hitachi SH-3 series RISC processor SH7709 is used as the example.
The main ISP1161A1 signals to be taken into consideration for connecting to a
SH7709 RISC processor are:
A 16-bit data bus: D[15:0] for the ISP1161A1. The ISP1161A1 is ‘little endian’
compatible.
Two address lines A1 and A0 are needed for a complete addressing of the
ISP1161A1 internal registers:
A1 = 0 and A0 = 0 will select the Data Port of the Host Controller
A1 = 0 and A0 = 1 will select the Command Port of the Host Controller
A1 = 1 and A0 = 0 will select the Data Port of the Device Controller
A1 = 1 and A0 = 1 will select the Command Port of the Device Controller
The CS line is used for chip selection of the ISP1161A1 in a certain address range
of the RISC system. This signal is active LOW.
RD and WR are common read and write signals. These signals are active LOW.
There are two DMA channel standard control lines:
DREQ1 and DACK1
DREQ2 and DACK2
(in each case one channel is used by the HC and the other channel is used by
the DC). These signals have programmable active levels.
Two interrupt lines: INT1 (used by the HC) and INT2 (used by the device
controller). Both have programmable level/edge and polarity (active HIGH or
LOW).
The internal 15 k
pull-down resistors are used for the HC’s two USB downstream
ports.
The RESET signal is active LOW.
Remark: SH7709’s system clock input is for reference only. Refer to SH7709’s
specication for its actual use.
The ISP1161A1 can work under either 3.3 V or 5.0 V power supply; however, its
internal core works at 3.3 V. When using 3.3 V as the power supply input, the internal
DC/DC regulator will be bypassed. It is best to connect all four power supply pins
(VCC,Vreg(3.3),Vhold1 and Vhold2) to the 3.3 V power supply (for more information, see
Section 14). All of the ISP1161A1’s I/O pins are 5 V tolerant. This feature allows the
ISP1161A1 the exibility to be used in an embedded system under either a 3.3 V or a
5 V power supply.
A typical SH7709 interface circuit is shown in Figure 64.
21.3 Typical software model
This section shows a typical software requirement for an embedded system that
incorporates the ISP1161A1. The software model for a Digital Still Camera (DSC) is
used as the example for illustration (as shown in Figure 65). Two components of
system software are required to make full use of the features in the ISP1161A1: the
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ISP1161A1BMGA 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1161A1BM-S 功能描述:USB 接口集成電路 USB HOST+DEV CTRLR RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BM-T 功能描述:USB 接口集成電路 USB1.1 HOST/DEVICE CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
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ISP1161ABD 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A