參數資料
型號: ISP1161A1BM,557
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數: 45/137頁
文件大小: 599K
代理商: ISP1161A1BM,557
Philips Semiconductors
ISP1161A1
USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
14 of 136
9397 750 13961
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Figure 10 and Figure 11 illustrate how an external microprocessor accesses the
ISP1161A1 internal control registers.
8.3.2
Register access phases
The ISP1161A1 register structure is a command-data register pair structure. A
complete register access cycle comprises a command phase followed by a data
phase. The command (also known as the index of a register) points the ISP1161A1 to
the next register to be accessed. A command is 8 bits long. On a microprocessor’s
16-bit data bus, a command occupies the lower byte, with the upper byte lled with
zeros.
Figure 12 shows a complete 16-bit register access cycle for the ISP1161A1. The
microprocessor writes a command code to the command port, and then reads or
writes the data word from or to the data port. Take the example of a microprocessor
attempting to read the ISP1161A1’s ID, which is saved in the HC’s HcChipID register
(index 27H, read only). The 16-bit register access cycle is therefore:
1. Microprocessor writes the command code of 27H (0027H in 16-bit width) to
the HC command port
2. Microprocessor reads the data word of the chip’s ID (6110H for engineering
sample; version one) from the HC data port.
When A1 = 0, the microprocessor accesses the HC.
When A1 = 1, the microprocessor accesses the DC.
Fig 10. Microprocessor access to a HC or a DC via an automux switch.
When A0 = 0, the microprocessor accesses the data port.
When A0 = 1, the microprocessor accesses the command port.
Fig 11. Microprocessor access to internal control registers.
MGT935
P bus I/F
Host bus I/F
Device bus I/F
AUTOMUX
DC/HC
A1
0
1
MGT936
CMD/DATA
SWITCH
Commands
Control registers
Command register
data port
A0
command port
..
.
Host or Device
bus I/F
1
0
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