參數(shù)資料
型號: ISP1161A1BM,557
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64
文件頁數(shù): 35/137頁
文件大?。?/td> 599K
代理商: ISP1161A1BM,557
Philips Semiconductors
ISP1161A1
USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
12 of 136
9397 750 13961
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.6 GoodLink
Indication of a good USB connection is provided at pin GL through GoodLink
technology. During enumeration, the LED indicator will blink on momentarily. When
the DC has been successfully enumerated (the device address is set), the LED
indicator will remain permanently on. Upon each successful packet transfer (with
ACK) to and from the ISP1161A1 the LED will blink off for 100 ms. During ‘suspend’
state the LED will remain off.
This feature provides a user-friendly indication of the status of the USB device, the
connected hub and the USB trafc. It is a useful eld diagnostics tool for isolating
faulty equipment. It can therefore help to reduce eld support and hotline overhead.
8.
Microprocessor bus interface
8.1 Programmed I/O (PIO) addressing mode
A generic PIO interface is dened for speed and ease-of-use. It also allows direct
interfacing to most microcontrollers. To a microcontroller, the ISP1161A1 appears as
a memory device with a 16-bit data bus and uses only two address lines: A1 and A0
to access the internal control registers and FIFO buffer RAM. Therefore, the
ISP1161A1 occupies only four I/O ports or four memory locations of a
microprocessor. External microprocessors can read from or write to the ISP1161A1
internal control registers and FIFO buffer RAM through the Programmed I/O (PIO)
operating mode. Figure 8 shows the Programmed I/O interface between a
microprocessor and an ISP1161A1.
8.2 DMA mode
The ISP1161A1 also provides DMA mode for external microprocessors to access its
internal FIFO buffer RAM. Data can be transferred by DMA operation between a
microprocessor’s system memory and the ISP1161A1 internal FIFO buffer RAM.
Remark: The DMA operation must be controlled by the external microprocessor
system DMA controller (Master).
Fig 8.
Programmed I/O interface between a microprocessor and an ISP1161A1.
004aaa178
D[15:0]
RD
WR
CS
A2
IRQ2
MICRO-
PROCESSOR
ISP1161A1
D[15:0]
P bus I/F
RD
WR
CS
A1
IRQ1
A0
INT1
INT2
相關PDF資料
PDF描述
ISP1181BBS,551 UNIVERSAL SERIAL BUS CONTROLLER, PQCC48
ISP1181BBS,518 UNIVERSAL SERIAL BUS CONTROLLER, PQCC48
ISP1181BDGG,112 UNIVERSAL SERIAL BUS CONTROLLER, PDSO48
ISP1183BS,157 UNIVERSAL SERIAL BUS CONTROLLER, PQCC32
ISP1362EE,551 UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
相關代理商/技術參數(shù)
參數(shù)描述
ISP1161A1BMGA 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1161A1BM-S 功能描述:USB 接口集成電路 USB HOST+DEV CTRLR RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BM-T 功能描述:USB 接口集成電路 USB1.1 HOST/DEVICE CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BMUM 功能描述:IC USB HOST CONTROLLER 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
ISP1161ABD 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A