參數(shù)資料
型號： KSZ8841-PMQL
廠商： Micrel Inc
文件頁數(shù)： 4/74頁
文件大?。?/td> 0K
描述： IC MAC CTRLR 32BIT 128-PQFP
應(yīng)用說明： AN-142 Wake-on-LAN and Wake-Up Event
標(biāo)準(zhǔn)包裝： 66
控制器類型： 以太網(wǎng)控制器，MAC
接口： 總線
電源電壓： 3.1 V ~ 3.5 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
產(chǎn)品目錄頁面： 1080 (CN2011-ZH PDF)
配用： 576-1633-ND - BOARD EVALUATION KSZ8841-PMQL
其它名稱： 576-2117
KSZ8841-PMQL-ND
Micrel, Inc.
KSZ8841-PMQL
October 2007
12
M9999-100407-1.5
Pin
Number
Pin
Name
Type
Pin Function
during read/write operation.
72
STOPN
I/O
PCI Stop
This signal is asserted low by the target device to request the master device to stop the
current transaction.
73
IDSEL
I/O
PCI Initialization Device Select
This signal is used to select the KSZ8841-PMQL during configuration read and write
transactions. Active high.
74
DEVSELN
I/O
PCI Device Select
This signal is asserted low when it is selected as a target during a bus transaction. As a
bus master, the KSZ8841-PMQL samples this signal to insure that a PCI target
recognizes the destination address for the data transfer.
75
REQN
O
PCI Bus Request
The KSZ8841-PMQL will assert this signal low to request PCI bus master operation.
76
GNTN
I
PCI Bus Grant
This signal is asserted low to indicate to the KSZ8841-PMQL that it has been granted
the PCI bus master operation.
77
PERRN
I/O
PCI Parity Error
The KSZ8841-PMQL as a master or target will assert this signal low to indicate a parity
error on any incoming data. As a bus master, it will monitor this signal on all write
operations.
78
DGND
Gnd
Digital ground
79
VDDIO
P
3.3V digital I/O VDD
80
SERRN
O
PCI System Error
This system error signal is asserted low by the KSZ8841-PMQL. This signal is used to
report address parity errors.
81
NC
—
No connect
82
NC
—
No connect
83
NC
—
No connect
84
NC
—
No connect
85
CBE3N
I/O
86
CBE2N
I/O
87
CBE1N
I/O
88
CBE0N
I/O
Command and Byte Enable
These signals are multiplexed on the same PCI pins. During the address phase, these
lines define the bus command. During the data phase, these lines are used as Byte
Enables, The Byte enables are valid for the entire data phase and determine which byte
lanes carry meaningful data.
89
PAD31
I/O
PCI Address / Data 31
Address and data are multiplexed on the all of the PAD pins. The PAD pins carry the
physical address during the first clock cycle of a transaction, and carry data during the
subsequent clock cycles.
90
DGND
Gnd
Digital core ground
91
VDDC
P
1.2V digital core VDD
92
VDDIO
P
3.3V digital I/O VDD
93
PAD30
I/O
PCI Address / Data 30
94
PAD29
I/O
PCI Address / Data 29
95
PAD28
I/O
PCI Address / Data 28
96
PAD27
I/O
PCI Address / Data 27
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PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8841-PMQL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 KSZ8841-PMQL Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
KSZ8841-PMQLI 功能描述:以太網(wǎng) IC Single Ethernet Port + 32-bit/33MHz PCI interface, Ind Temp (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8842 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2-Port Ethernet Switch with PCI Interface
KSZ8842-16 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2-Port Ethernet Switch with Non-PCI Interface
KSZ8842-16_08 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2-Port Ethernet Switch with Non-PCI Interface
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