參數(shù)資料
型號: KSZ8842-PMBL AM TR
廠商: Micrel Inc
文件頁數(shù): 115/119頁
文件大?。?/td> 0K
描述: IC ETHERNET SW 2PORT 100LFBGA
標(biāo)準(zhǔn)包裝: 1,000
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: PCI
電源電壓: 3.1 V ~ 3.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LFBGA
供應(yīng)商設(shè)備封裝: 100-LFBGA
包裝: 帶卷 (TR)
Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
95
M9999-100207-1.5
Bit
Default
R/W
Description
Is the same as:
0
RO
Partner 10BT half duplex capability
1 = link partner 10Base-T half duplex capable
0 = link partner not 10Base-T half duplex capable
P2ANLPR, bit 5
Port 2 Reserved (Offset 0x0536 – 0x053A)
This register is reserved.
Bit
Default
R/W
Description
15 – 0
0x0000
RO
Reserved
Host Control Register 1 (Offset 0x0540): P3CR1
This register contains the global per port control for the switch host port function.
Bit
Default
R/W
Description
15 – 8
0x00
RO
Reserved
7
0
RW
Broadcast storm protection enable
1 = enable broadcast storm protection for ingress packets on the port
0 = disable broadcast storm protection
6
0
RW
Diffserv priority classification enable
1 = enable diffserv priority classification for ingress packets on port
0 = disable diffserv function
5
0
RW
802.1p priority classification enable
1 = enable 802.1p priority classification for ingress packets on port
0 = disable 802.1p
4 – 3
00
RW
Port based priority classification
00 = ingress packets on port 1 will be classified as priority 0 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
01 = ingress packets on port 1 will be classified as priority 1 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
10 = ingress packets on port 1 will be classified as priority 2 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
11 = ingress packets on port 1 will be classified as priority 3 queue if
“Diffserv” or “802.1p” classification is not enabled or fails to classify.
Note: “Diffserv”, “802.1p” and port priority can be enabled at the same
time. The OR’ed result of 802.1p and DSCP overwrites the port priority.
2
0
RW
Tag insertion
1 = when packets are output on the port, the switch will add 802.1p/q tags
to packets without 802.1p/q tags when received. The switch will not add
tags to packets already tagged. The tag inserted is the ingress port’s “port
VID”.
0 = disable tag insertion
1
0
RW
Tag removal
1 = when packets are output on the port, the switch will remove 802.1p/q
tags from packets with 802.1p/q tags when received. The switch will not
modify packets received without tags.
0 = disable tag removal
0
RW
TX Multiple Queues Select Enable
1 = the port output queue is split into fourpriority queues.
0 = single output queue on the port. There is no priority differentiation
even though packets are classified into high or low priority.
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