參數(shù)資料
型號: KSZ8842-PMBL AM TR
廠商: Micrel Inc
文件頁數(shù): 82/119頁
文件大?。?/td> 0K
描述: IC ETHERNET SW 2PORT 100LFBGA
標(biāo)準(zhǔn)包裝: 1,000
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: PCI
電源電壓: 3.1 V ~ 3.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LFBGA
供應(yīng)商設(shè)備封裝: 100-LFBGA
包裝: 帶卷 (TR)
Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
65
M9999-100207-1.5
Indirect Access Data Register 5 (Offset 0x04AA): IADR5
This register contains the indirect data for the switch function.
Bit
Default
R/W
Description
15 – 0
0x0000
RW
Indirect data
Bit 31-16 of indirect data
Reserved (Offset 0x04B0 - 0x04BA)
Reserved (Offset 0x04C0 –0x04CF)
PHY 1 MII Basic Control Register (Offset 0x04D0): P1MBCR
This register contains the MII control for the switch port 1 function.
Bit
Default
R/W
Description
Is the same as:
15
0
RO
Soft reset
Not supported
14
0
RW
Loop back
1 = perform loop back as follows:
Start: RXP1/RXM1 (port 2)
Loop back: PMD/PMA of port 1’s PHY
End: TXP1/TXM1 (port 2)
0 = normal operation.
P1CR4, bit 8
13
0
RW
Force 100
1 = 100 Mbps if AN is disabled (bit 12)
0 = 10 Mbps if AN is disabled (bit 12)
P1CR4, bit 6
12
1
RW
AN enable
1 = Auto-negotiation enabled
0 = Auto-negotiation disabled
P1CR4, bit 7
11
0
RW
Power down
1 = Power down the PHY 1
0 = Normal operation
P1CR4, bit 11
10
0
RO
Isolate
Not supported
9
0
RW
Restart AN
1 = Restart auto-negotiation
0 = Normal operation
P1CR4, bit 13
8
0
RW
Force full duplex
1 = Full duplex if AN is disabled (bit 12)
0 = Half duplex if AN is disabled (bit 12)
P1CR4, bit 5
7
0
RO
Collision test
Not supported
6
0
RO
Reserved
5
0
R/W
HP_mdix
1 = HP Auto MDIX mode
0 = Micrel Auto MDIX mode
P1SR, bit 15
4
0
RW
Force MDIX
1 = Force MDIX
0 = Normal operation
P1CR4, bit 9
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