參數(shù)資料
型號(hào): KSZ8842-PMBL AM TR
廠商: Micrel Inc
文件頁(yè)數(shù): 80/119頁(yè)
文件大?。?/td> 0K
描述: IC ETHERNET SW 2PORT 100LFBGA
標(biāo)準(zhǔn)包裝: 1,000
控制器類(lèi)型: 以太網(wǎng)開(kāi)關(guān)控制器
接口: PCI
電源電壓: 3.1 V ~ 3.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 100-LFBGA
供應(yīng)商設(shè)備封裝: 100-LFBGA
包裝: 帶卷 (TR)
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Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
63
M9999-100207-1.5
Bit
Default
R/W
Description
3:2
0
RW
DSCP[99:98]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xc4.
1:0
0
RW
DSCP[97:96]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xc0.
TOS Priority Control Register 8 (Offset 0x492): TOSR8
This register contains the TOS priority control for the switch function.
Bit
Default
R/W
Description
15:14
0
RW
DSCP[127:126]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xfC.
13:12
0
RW
DSCP[125:124]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xf8.
11:10
0
RW
DSCP[123:122]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xf4.
9:8
0
RW
DSCP[121:120]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xf0.
7:6
0
RW
DSCP[119:118]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xeC.
5:4
0
RW
DSCP[117:116]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xe8.
3:2
0
RW
DSCP[115:114]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xe4.
1:0
0
RW
DSCP[113:112]
The value in this field is used as the frame’s priority when bits [7:2] of it IP
TOS/DiffServ/Traffic Class value is 0xe0.
Reserved (Offset 0x0494 - 0x049A)
This register is reserved.
Bit
Default
R/W
Description
15 – 0
0x0000
RO
Reserved
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