(V
參數(shù)資料
型號(hào): KSZ8842-PMBL AM TR
廠商: Micrel Inc
文件頁數(shù): 12/119頁
文件大小: 0K
描述: IC ETHERNET SW 2PORT 100LFBGA
標(biāo)準(zhǔn)包裝: 1,000
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: PCI
電源電壓: 3.1 V ~ 3.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LFBGA
供應(yīng)商設(shè)備封裝: 100-LFBGA
包裝: 帶卷 (TR)
Micrel, Inc.
KSZ8842-PMQL/PMBL
October 2007
109
M9999-100207-1.5
Absolute Maximum Ratings
(1)
Supply Voltage
(VDDATX, VDDARX, VDDIO) ........................... –0.5V to +4.0V
Input Voltage (all inputs). ............................. –0.5V to +5.0V
Output Voltage (all outputs) ......................... –0.5V to +4.0V
Lead Temperature (soldering, 10sec.) ....................... 270°C
Storage Temperature (Ts) .........................–55°C to +150°C
Operating Ratings
(2)
Supply Voltage
(VDDATX, VDDARX, VDDIO)...................... +3.1V to +3.5V
Ambient Temp. of MQL/MBL(TA)............ 0°C to +70°C
Ambient Temp. of MQLI/MBL AM(TA) . -40°C to +85°C
Junction Temperature (TJ)................................. 125°C
Package Thermal Resistance
(3)
PQFP (
θ
JA) No Air Flow........................ 42.91°C/W
PQFP (
θ
JC) No Air Flow .......................... 19.6°C/W
LFBGA (
θ
JA) No Air Flow...................... 38.50°C/W
LFBGA (
θ
JC) No Air Flow ...................... 12.50°C/W
Electrical Characteristics
(4)
Symbol
Parameter
Condition
Min
Typ
Max
Units
Supply Current
100BASE-TX Operation (All Ports @ 100% Utilization)
IDDXIO
100BASE-TX
(Analog Core + PLL + Digital Core
+ Transceiver + Digital I/O)
VDDATX, VDDARX, VDDIO = 3.3V
122
mA
10BASE-T Operation (All Ports @ 100% Utilization)
IDDXIO
100BASE-T
(Analog Core + PLL + Digital Core
+ Transceiver + Digital I/O)
VDDATX, VDDARX, VDDIO = 3.3V
90
mA
TTL Inputs
VIH
Input High Voltage
2.0
V
VIL
Input Low Voltage
0.8
V
IIN
Input Current
VIN = GND ~ VDDIO
–10
10
A
TTL Outputs
VOH
Output High Voltage
IOH = –8mA
2.4
V
VOL
Output Low Voltage
IOL = 8mA
0.4
V
IOZ
Output Tri-state Leakage
10
A
100Base-TX Transmit (measured differentially after 1:1 transformer) VDDATX = 3.3V only
VO
Peak Differential Output Voltage
100
termination on the differential output.
0.95
1.05
V
VIMB
Output Voltage Imbalance
100
termination on the differential output.
2
%
Rise/Fall Time
3
5
ns
Rise/Fall Time Imbalance
0
0.5
ns
Duty Cycle Distortion
±0.5
ns
tr, tf
Overshoot
5
%
Reference Voltage of ISET
0.5
V
VSET
Output Jitter
Peak to peak
0.7
1.4
ns
10Base-T Receive
VSQ
Squelch Threshold
5MHz square wave
400
mV
10Base-T Transmit (measured differentially after 1:1 transformer) VDDATX = 3.3V only
Peak Differential Output Voltage
100
termination on the differential output.
2.4
V
VP
Jitter Added
100
termination on the differential output.
1.8
±3.5
ns
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