參數(shù)資料
型號(hào): LAN9116
廠商: SMSC Corporation
英文描述: Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
中文描述: 高效的單芯片10/100非PCI以太網(wǎng)控制器
文件頁數(shù): 102/126頁
文件大?。?/td> 831K
代理商: LAN9116
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.1 (05-17-05)
102
SMSC LAN9116
DATASHEET
5.5.1
Basic Control Register
4
Auto-Negotiation Advertisement Register
5
Auto-Negotiation Link Partner Ability Register
6
Auto-Negotiation Expansion Register
17
Mode Control/Status Register
18
Special Modes Register
27
Special Control/Status Indications
29
Interrupt Source Register
30
Interrupt Mask Register
31
PHY Special Control/Status Register
Index (In Decimal):
0
Size:
16-bits
BITS
DESCRIPTION
TYPE
DEFAULT
15
Reset.
1 = software reset. Bit is self-clearing. For best results, when setting
this bit do not set other bits in this register.
RW/SC
0
14
Loopback.
1 = loopback mode, 0 = normal operation
RW
0
13
Speed Select.
1 = 100Mbps, 0 = 10Mbps. Ignored if Auto Negotiation is
enabled (0.12 = 1).
RW
See
Note 5.1
12
Auto-Negotiation Enable.
1 = enable auto-negotiate process (overrides
0.13 and 0.8) 0 = disable auto-negotiate process.
RW
See
Note 5.1
11
Power Down.
1 = General power down-mode, 0 = normal operation.
Note:
After this bit is cleared, the PHY may auto-negotiate with it's
partner station. This process may take a few seconds to complete.
Once auto-negotiation is complete, bit 5 of the PHY's Basic Status
Register will be set.
RW
0
10
Reserved
RO
0
9
Restart Auto-Negotiate.
1 = restart auto-negotiate process 0 = normal
operation. Bit is self-clearing.
RW/SC
0
8
Duplex Mode.
1 = full duplex, 0 = half duplex. Ignored if Auto Negotiation
is enabled (0.12 = 1).
RW
0
7
Collision Test.
1 = enable COL test, 0 = disable COL test
RW
0
Table 5.8 LAN9116 PHY Control and Status Register (continued)
PHY CONTROL AND STATUS REGISTERS
INDEX
(IN DECIMAL)
REGISTER NAME
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