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參數(shù)資料
| 型號： | LAN9116 |
| 廠商： | SMSC Corporation |
| 英文描述： | Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller |
| 中文描述： | 高效的單芯片10/100非PCI以太網(wǎng)控制器 |
| 文件頁數(shù)： | 45/126頁 |
| 文件大?。?/td> | 831K |
| 代理商： | LAN9116 |
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Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
SMSC LAN9116
45
Revision 1.1 (05-17-05)
DATASHEET
Both TX command ‘A’ and TX command ‘B’ are required for each buffer in a given packet. TX
command ‘B’ must be identical for every buffer in a given packet. If the TX command ‘B’ words do not
match, the Ethernet controller will assert the Transmitter Error (TXE) flag.
TX COMMAND ‘A’
Table 3.11 TX Command 'A' Format
BITS
DESCRIPTION
31
Interrupt on Completion.
When set, the TXDONE flag will be asserted when the current buffer has
been fully loaded into the TX FIFO. This flag may be optionally mapped to a host interrupt.
30:26
Reserved.
These bits are reserved. Always write zeros to this field to guarantee future compatibility.
25:24
Buffer End Alignment.
This field specifies the alignment that must be maintained on the last data
transfer of a buffer. The host will add extra DWORDs of data up to the alignment specified in the
table below. The LAN9116 will remove the extra DWORDs. This mechanism can be used to maintain
cache line alignment on host processors.
23:21
Reserved.
These bits are reserved. Always write zeros to this field to guarantee future compatibility
20:16
Data Start Offset (bytes).
This field specifies the offset of the first byte of TX data. The offset value
can be anywhere from 0 bytes to 31 a Byte offset.
15:14
Reserved.
These bits are reserved. Always write zeros to this field to guarantee future compatibility
13
First Segment.
When set, this bit indicates that the associated buffer is the first segment of the
packet.
12
Last Segment.
When set, this bit indicates that the associated buffer is the last segment of the
packet
11
Reserved.
These bits are reserved. Always write zeros to this field to guarantee future compatibility.
10:0
Buffer Size (bytes).
This field indicates the number of bytes contained in the buffer following this
command. This value, along with the Buffer End Alignment field, is read and checked by the LAN9116
and used to determine how many extra DWORD’s were added to the end of the Buffer. A running
count is also maintained in the LAN9116 of the cumulative buffer sizes for a given packet. This
cumulative value is compared against the Packet Length field in the TX command ‘B’ word and if
they do not correlate, the TXE flag is set.
Note:
The buffer size specified does not include the buffer end alignment padding or data start
offset added to a buffer.
[25]
[24]
End Alignment
0
0
4-byte alignment
0
1
16-byte alignment
1
0
32-byte alignment
1
1
Reserved
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| LAN9117-MD | HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER |
| LAN9117-MT | HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LAN9116-MD | 功能描述:以太網(wǎng) IC Efficient Sngl Chip 10/100 Ethrnt RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| LAN9116-MT | 功能描述:以太網(wǎng) IC Ethernet IC 32bit Superior Perf RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| LAN9117 | 制造商:SMSC 制造商全稱:SMSC 功能描述:HIGH PERFORMANCE SINGLE-CHIP 10/100 NON-PCI ETHERNET CONTROLLER |
| LAN9117-MD | 功能描述:以太網(wǎng) IC HiPerfrm Sngl-Chip 10/100 Ethrnt RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| LAN9117-MT | 功能描述:以太網(wǎng) IC HiPerfrm Sngl-Chip 10/100 Ethrnt RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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