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參數(shù)資料
| 型號： | LC72715PW |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, SQFP-64 |
| 文件頁數(shù)： | 3/26頁 |
| 文件大?。?/td> | 167K |
| 代理商： | LC72715PW |
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LC72715PW
No.A1650-11/26
(2) Register output
This is to read data from the register in LSI. Only the status register (STAT) and block number register (BLNO) in
LSI can be read.
For accessing, input the register address in A0 to A3, set the CS pin = L, and then the RD pin = L. This causes the
RDY pin to change from “H” to “L”. Then, data is output from the D(n) pin after the RDY pin becomes “H”. It is
necessary to keep an interval of tCYRD or more before the next data output. (n: 0-7 for BUSWD=L and 0 – 15 for
BUSWD=H.)
By setting bit 3 (RDY) = 1 of the control register 2, the RDY pin output method can be changed. In this case, the
RDY pin changes from “H” to “L” in the timing enabling output of the acquired data and the pin returns to “H” after
the end of data output (shown as Timing 2 in the figure).
tSARD
tHARD
tDRDY2
tWRDL
tCYRD
A0 to A3
CS
RD
D(n)
VALID
OUTPUT
RDY (Timing1: default)
tWRDY
tDRDY
RDY (Timing2)
tDDATn
tRDH
tDRDY+tWRDY
tDATON
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