參數(shù)資料
型號(hào)： LH540215
廠商： Sharp Corporation
英文描述： 512 x 18 / 1024 x 18 Synchronous FIFO
中文描述： 512 ×一千〇二十四分之一十八× 18同步FIFO
文件頁(yè)數(shù)： 9/48頁(yè)
文件大?。?/td> 423K
代理商： LH540215
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
Supply Voltage to V
SS
Potential
Signal Pin Voltage to V
SS
Potential
DC Output Current
1
Temperature Range with Power Applied
2
Storage Temperature Range
Power Dissipation (PLCC Package Limit)
–0.5 V to 7 V
–0.5 V to V
CC
+ 0.5 V
±
75 mA
–55
°
C to 125
°
C
–65
°
C to 150
°
C
2 W
NOTES:
1.
Only one output may be shorted at a time, for a period not exceeding 30 seconds.
2.
Measured with clocks idle.
OPERATING RANGE
SYMBOL
T
A
V
CC
V
SS
V
IL
V
IH
PARAMETER
MIN.
0
4.5
0
–0.5
2.0
MAX.
70
5.5
0
0.8
V
CC
+ 0.5
UNIT
C
V
V
V
V
Temperature, Ambient
Supply Voltage
Supply Voltage
Logic LOW Input Voltage
Logic HIGH Input Voltage
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
SYMBOL
I
LI
I
LO
V
OH
V
OL
I
CC
I
CC2
I
CC3
PARAMETER
TEST CONDITIONS
MIN.
–10
–10
2.4
MAX.
10
10
UNIT
μ
A
μ
A
V
V
mA
mA
mA
Input Leakage
I/O Leakage
Output HIGH Voltage
Output LOW Voltage
Average Operating Supply Current
1
Average Standby Supply Current
Power-Down Supply Current
V
CC
= 5.5 V, V
IN
= 0 V to V
CC
OE
≥
V
IH
, 0 V
≤
V
OUT
≤
V
CC
I
OH
= –12.0 mA
I
OL
= 16.0 mA
Measured at f
CC
= 50 MHz
All inputs = V
IH
MIN. (clocks idle)
All inputs = V
CC
– 0.2 V (clocks idle)
0.4
190
25
1
NOTE:
1.
Output load is disconnected.
AC TEST CONDITIONS
PARAMETER
RATING
V
SS
to 3 V
Input Pulse Levels
Input Rise and Fall Times
(10% to 90%)
Input Timing Reference Levels
Output Timing Reference Levels
Output Load,
Timing Tests
(Figure 4)
3 ns
1.5 V
1.5 V
1.1k
680
30 pF
R
1
(Top Resistor)
R
2
(Bottom Resistor)
C
L
(Load Capacitance)
CAPACITANCE
1, 2
PARAMETER
RATING
8 pF
8 pF
C
IN
(Input Capacitance) V
IN
= 0 V
C
OUT
(Output Capacitance) V
OUT
= 0 V
NOTES:
1.
Sample tested only.
2.
Capacitances are maximum values at 25°C, measured at
1.0 MHz, with V
IN
= 0 V.
540215-3
DEVICE
UNDER
TEST
+5 V
30 pF
1.1 k
680
INCLUDES JIG AND SCOPE CAPACITANCES
*
*
Figure 4. Output Load Circuit
BOLD ITALIC = Enhanced Operating Mode
512 x 18/1024 x 18 Synchronous FIFO
LH540215/25
9
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