參數(shù)資料
型號： M25PE40VMN6G
廠商： 意法半導(dǎo)體
元件分類： DRAM
英文描述： 4 Mbit Uniform Sector, Serial Flash Memory
中文描述： 4兆位統(tǒng)一部門，串行閃存
文件頁數(shù)： 12/60頁
文件大小： 315K
代理商： M25PE40VMN6G
Operating features
M25PE40
12/60
4
Operating features
4.1
Sharing the overhead of modifying data
To write or program one (or more) data bytes, two instructions are required: Write Enable
(WREN), which is one byte, and a Page Write (PW) or Page Program (PP) sequence, which
consists of four bytes plus data. This is followed by the internal cycle (of duration t
PW
or t
PP
).
To share this overhead, the Page Write (PW) or Page Program (PP) instruction allows up to
256 bytes to be programmed (changing bits from 1 to 0) or written (changing bits to 0 or 1) at
a time, provided that they lie in consecutive addresses on the same page of memory.
4.2
An easy way to modify data
The Page Write (PW) instruction provides a convenient way of modifying data (up to 256
contiguous bytes at a time), and simply requires the start address, and the new data in the
instruction sequence.
The Page Write (PW) instruction is entered by driving Chip Select (S) Low, and then
transmitting the instruction byte, three address bytes (A23-A0) and at least one data byte,
and then driving Chip Select (S) High. While Chip Select (S) is being held Low, the data
bytes are written to the data buffer, starting at the address given in the third address byte
(A7-A0). When Chip Select (S) is driven High, the Write cycle starts. The remaining,
unchanged, bytes of the data buffer are automatically loaded with the values of the
corresponding bytes of the addressed memory page. The addressed memory page then
automatically put into an Erase cycle. Finally, the addressed memory page is programmed
with the contents of the data buffer.
All of this buffer management is handled internally, and is transparent to the user. The user
is given the facility of being able to alter the contents of the memory on a byte-by-byte basis.
For optimized timings, it is recommended to use the Page Write (PW) instruction to write all
consecutive targeted bytes in a single sequence versus using several Page Write (PW)
sequences with each containing only a few bytes (see
Section 6.9: Page Write (PW)
and
Table 20: AC characteristics (50 MHz operation, T9HX (0.11μm) process)
).
相關(guān)PDF資料
PDF描述
M25PE40VMN6P 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6TG 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6TP 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMP6G 1A Standard Fixed Output LDO Regulators with Shutdown Switch; Package: TO220FP-5; Constitution materials list: Packing style: Tube packaging; Package quantity: 50; Minimum package quantity: 500;
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M25PE40-VMN6G 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout
M25PE40VMN6P 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout
M25PE40-VMN6P 制造商:Micron Technology Inc 功能描述:NOR Flash Serial-SPI 3.3V 4Mbit 512K x 8bit 8ns 8-Pin SOIC N Tray 制造商:Micron Technology Inc 功能描述:FLASH SERL-SPI 3.3V 4MBIT 512KX8 15NS 8SOIC N - Trays 制造商:Micron Technology 功能描述:NOR Flash Serial-SPI 3.3V 4Mbit 512K x 8bit 8ns 8-Pin SOIC N Tray
M25PE40VMN6TG 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout
M25PE40-VMN6TG 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout
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