參數(shù)資料
型號： M25PE40VMN6G
廠商： 意法半導(dǎo)體
元件分類： DRAM
英文描述： 4 Mbit Uniform Sector, Serial Flash Memory
中文描述： 4兆位統(tǒng)一部門，串行閃存
文件頁數(shù)： 14/60頁
文件大?。?/td> 315K
代理商： M25PE40VMN6G
Operating features
M25PE40
14/60
4.7
Status Register
The Status Register contains a number of status and control bits that can be read or set (as
appropriate) by using specific instructions. See
Section 6.4: Read Status Register (RDSR)
for a detailed description of the Status Register bits.
4.8
Protection modes
The environments where non-volatile memory devices are used can be very noisy. No SPI
device can operate correctly in the presence of excessive noise. To help combat this, the
features the following data protection mechanisms:
4.8.1
Protocol-related protections
●
Power On Reset and an internal timer (t
PUW
) can provide protection against inadvertent
changes while the power supply is outside the operating specification.
Program, Erase and Write instructions are checked that they consist of a number of
clock pulses that is a multiple of eight, before they are accepted for execution.
All instructions that modify data must be preceded by a Write Enable (WREN)
instruction to set the Write Enable Latch (WEL) bit. This bit is returned to its reset state
by the following events:
–
Power-up
–
Reset (RESET) driven Low
–
Write Disable (WRDI) instruction completion
–
Page Write (PW) instruction completion
–
Page Program (PP) instruction completion
–
Write to Lock Register (WRLR) instruction completion
–
Page Erase (PE) instruction completion
–
SubSector Erase (SSE) instruction completion
–
Sector Erase (SE) instruction completion
–
Bulk Erase (BE) instruction completion
The Reset (Reset) signal can be driven Low to freeze and reset the internal logic. For
the specific cases of Program and Write cycles, the designer should refer to
Section 6.5: Write Status Register (WRSR)
,
Section 6.9: Page Write (PW)
,
Section 6.10: Page Program (PP)
,
Section 6.12: Page Erase (PE)
,
Section 6.14: Sector
Erase (SE)
, and
Section 6.13: SubSector Erase (SSE)
, and to
Table 12: Device status
after a Reset Low pulse
.
In addition to the low power consumption feature, the Deep Power-down mode offers
extra software protection from inadvertent Write, Program and Erase instructions while
the device is not in active use.
●
●
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相關(guān)PDF資料
PDF描述
M25PE40VMN6P 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6TG 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMN6TP 4 Mbit Uniform Sector, Serial Flash Memory
M25PE40VMP6G 1A Standard Fixed Output LDO Regulators with Shutdown Switch; Package: TO220FP-5; Constitution materials list: Packing style: Tube packaging; Package quantity: 50; Minimum package quantity: 500;
M25PE40VMP6P 4 Mbit Uniform Sector, Serial Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M25PE40-VMN6G 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout
M25PE40VMN6P 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout
M25PE40-VMN6P 制造商:Micron Technology Inc 功能描述:NOR Flash Serial-SPI 3.3V 4Mbit 512K x 8bit 8ns 8-Pin SOIC N Tray 制造商:Micron Technology Inc 功能描述:FLASH SERL-SPI 3.3V 4MBIT 512KX8 15NS 8SOIC N - Trays 制造商:Micron Technology 功能描述:NOR Flash Serial-SPI 3.3V 4Mbit 512K x 8bit 8ns 8-Pin SOIC N Tray
M25PE40VMN6TG 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout
M25PE40-VMN6TG 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout
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