參數(shù)資料
型號(hào): M37735MHBXXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁(yè)數(shù): 63/93頁(yè)
文件大?。?/td> 1802K
代理商: M37735MHBXXXFP
63
MITSUBISHI MICROCOMPUTERS
M37735MHBXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Table 12 Relationship between memory allocation selection bits and addresses corresponding to chip-select signals CS0 and CS1
ROM AREA MODIFICATION FUNCTION
The internal ROM size and RAM size of the M37735MHBXXXFP can
be modified by the memory allocation control register’s bits 0,1 and 2
shown in Figure 70.
Figure 72 shows the memory allocation in which the internal ROM
size and RAM size are modified.
Make sure to write data in the memory allocation control register as
the flow shown in Figure 71.
This ROM area modification function is valid in memory expansion
mode and single-chip mode.
Table 12 shows the relationship between the memory allocation
selection bits and addresses corresponding to chip-select signals
CS0
and CS1.
When ordering a mask ROM, Mitsubishi Electric corp. produces the
mask ROM using the data within 128 Kbytes (addresses 00000016
01FFFF16). It is regardless of the selected ROM size (refer to MASK
ROM ORDER CONFIRMATION FORM.) Therefore, program “FF16
to the addresses out of the selected ROM area in the EPROM which
you tender when ordering a mask ROM.
Address 01FFFF16 of this microcomputer corresponds to the lowest
address of the EPROM which you tender.
76543210
00
ML2
ML1
ML0
Memory allocation control register
Memory allocation selection bits
ROM size
RAM size
0 0 0 : 124 Kbytes
3968 bytes
0 0 1 : 120 Kbytes
3968 bytes
0 1 0 : 60 Kbytes
2048 bytes
1 0 0 : 32 Kbytes
2048 bytes
1 0 1 : 16 Kbytes
2048 bytes
1 1 0 : 96 Kbytes
3968 bytes
0 0 : Always “00” (However, writing data “5516
shown in Figure 71 is possible.)
Address
6316
Note. Write to the memory allocation control register as the flow shown in Figure 71.
Fig. 70 Bit configuration of memory allocation control register
Memory allocation selection bits
Internal ROM area
Access addresses
CS0
CS1
ML2
ML1
ML0
0
1
0
1
0
1
0
1
0
1
0
00100016 – 01FFFF16
00200016 – 01FFFF16
00100016 – 00FFFF16
00800016 – 00FFFF16
00C00016 – 00FFFF16
00800016 – 01FFFF16
——————
00100016 – 001FFF16
00088016 – 000FFF16
00088016 – 007FFF16
00100016 – 007FFF16
02000016 – 03FFFF16
01000016 – 03FFFF16
00800016 – 00BFFF16
01000016 – 03FFFF16
02000016 – 03FFFF16
Writing data “5516” (LDM instruction)
Writing data “0Y16” (LDM instruction)
ML2, ML1, ML0 selection bits
Next instruction
How to write in memory allocation control register
Note. “Y” is the sum of bits to be set. For example, when setting bit 1 to “1”, “Y” becomes “2”.
Fig. 71 How to write data in memory allocation control register
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