參數(shù)資料
型號： M37735MHBXXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP80
封裝： 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 78/93頁
文件大?。?/td> 1802K
代理商： M37735MHBXXXFP
5
MITSUBISHI MICROCOMPUTERS
M37735MHBXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
BASIC FUNCTION BLOCKS
The M37735MHBXXXFP contains the following peripheral devices
on a single chip: ROM, RAM, CPU, bus interface unit, timers, serial
I/O, A-D converter, I/O ports, clock generating circuit and others. Each
of these devices is described below.
MEMORY
The memory map is shown in Figure 1. The address space has a
capacity of 16 Mbytes and is allocated to addresses from 016 to
FFFFFF16. The address space is divided by 64-Kbyte unit called bank.
The banks are numbered from 016 to FF16.
However, banks 1016 – FF16 of the 7735 group cannot be accessed.
Built-in ROM, RAM and control registers for internal peripheral devices
are assigned to banks 016 and 116.
The 124-Kbyte area from addresses 100016 to 1FFFF16 is the built-in
ROM. Addresses FFD616 to FFFF16 are the RESET and interrupt
vector addresses and contain the interrupt vectors. Refer to the section
on interrupts for details.
The 3968-byte area allocated to addresses from 8016 to FFF16 is the
built-in RAM. In addition to storing data, the RAM is used as stack
during a subroutine call or interrupts.
Peripheral devices such as I/O ports, A-D converter, serial I/O, timer,
and interrupt control registers are allocated to addresses from 016 to
7F16.
Additionally, the internal ROM and RAM area can be modified by
software. Refer to the section on ROM area modification function for
details.
A 256-byte direct page area can be allocated anywhere in bank 016
by using the direct page register (DPR). In the direct page addressing
mode, the memory in the direct page area can be accessed with two
words. Hence program steps can be reduced.
Fig. 1 Memory map
A-D/UART2 trans./rece.
Timer B2
Timer B1
Timer B0
Timer A4
Timer A3
Timer A2
Timer A1
Timer A0
INT2
/Key input
INT0
Watchdog timer
DBC
BRK instruction
Zero divide
RESET
Internal peripheral
devices
control registers
refer to Fig. 2 for
detail information
Interrupt vector table
00000016
00FFFF16
01000016
01FFFF16
Bank 016
Bank 116
FE000016
FEFFFF16
FF000016
FFFFFF16
Bank FF16
Bank FE16
01FFFF
00FFD6
000FFF
00000016
00007F16
00008016
16
Internal RAM
3968 bytes
Internal ROM
124 Kbytes
00FFFE
00FFD6
00007F16
16
00000016
UART1 transmission
UART1 receive
UART0 transmission
UART0 receive
INT1
Notes 1. Internal ROM and RAM area can be modified. (Refer to the section on ROM area modification function.)
2. Banks 1016 – FF16 cannot be accessed in the 7735 group.
001000
00FFFF16
16
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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