參數(shù)資料
型號: M58WR064HU70ZB6U
元件分類: PROM
英文描述: 4M X 16 FLASH 1.8V PROM, 70 ns, PBGA44
封裝: 7.70 X 9 MM, 0.50 MM PITCH, ROHS COMPLIANT, VFBGA-44
文件頁數(shù): 83/117頁
文件大?。?/td> 2300K
代理商: M58WR064HU70ZB6U
DC and AC parameters
M58WR064HU M58WR064HL
Figure 14.
Clock input AC Waveform
2. Sampled only, not 100% tested. For other timings please refer to Table 22: Asynchronous read AC
Table 23.
Synchronous read AC characteristics
Symbol
Alt
Parameter
M58WR064HU/L
Unit
70
S
ync
hro
n
ou
sR
ead
T
imi
ng
s
tAVKH
tAVCLKH Address Valid to Clock High
Min
5
ns
tELKH
tELCLKH Chip Enable Low to Clock High
Min
5
ns
tELTV
Chip Enable Low to Wait Valid
Max
11
ns
tEHEL
Chip Enable Pulse Width
(subsequent synchronous reads)
Min
14
ns
tEHTZ
Chip Enable High to Wait Hi-Z
Max
14
ns
tGHTV
Output Enable High to Wait Valid
Min
11
ns
tGLTV
Output Enable Low to Wait Valid
Max
11
ns
tKHAX
tCLKHAX Clock High to Address Transition
Min
7
ns
tKHQV
tKHTV
tCLKHQV
Clock High to Output Valid
Clock High to WAIT Valid
Max
11
ns
tKHQX
tKHTX
tCLKHQX
Clock High to Output Transition
Clock High to WAIT Transition
Min
3
ns
tLLKH
tADVLCLK
H
Latch Enable Low to Clock High
Min
5
ns
Clo
ck
S
p
ec
ifi
ca
tio
n
s
tKHKH(1)
1. The device can support jitters of +/-5% on clock frequency.
tCLK
Clock Period (66MHz)
Min
15
ns
tKHKL
tKLKH
Clock High to Clock Low
Clock Low to Clock High
Min
3.5
ns
tf
tr
Clock Fall or Rise Time
Max
3
ns
AI06981
tKHKH
tf
tr
tKHKL
tKLKH
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