參數(shù)資料
型號(hào): M66287FP
廠商: Mitsubishi Electric Corporation
英文描述: 262144-word x 8-bit x 3-FIELD MEMORY
中文描述: 262144字× 8位× 3場(chǎng)記憶
文件頁(yè)數(shù): 18/21頁(yè)
文件大?。?/td> 196K
代理商: M66287FP
MITSUBISHI <DIGITAL ASSP>
M66287FP
262144-word x 8-bit x 3-FIELD MEMORY
2002 MITSUBISHI ELECTRIC CORPORATION
18
z
ATTENTIONS when WCK and RCK STOP
The intervals of 16 cycles or more between a write cycle and a read cycle should be secured, and WCK and RCK should be
inputted for 16 cycles or more based on beginning of write n cycle at any timing, when both WCK and RCK or either of both
is stopped and the newest data is read after it restarts.
Output data becomes undefined when these restrictions are not filled.
<TIMING 1> When WCK and RCK stop synchronously
WCK
Dn
(n+1)
(n+2)
(n+m-1)
(n+m+2)
(n+m+3)
(n+m)
(n+2)
(n+3)
t
AC
t
OH
(n)
Qn
t
DS
t
DH
m
16
WRES = "H"
RRES = "H"
WE = "L"
RE = "L"
RCK
(n)
(n-1)
(n-m)
(n-m+1)
(n-m+2)
(n+m+1)
(n+1)
n cycle
n+1 cycle
n+2 cycle
n+m-1
cycle
m cycle
n+m cycle
n+m+1 cycle n+m+2 cycle n+m+3 cycle
n-m+1 cycle
n-m+2 cycle
n-1 cycle
n cycle
n+1 cycle
n+2 cycle
n+3 cycle
n-m cycle
<TIMING 2> When WCK and RCK stop asynchronously
m
16
WRES = "H"
RRES = "H"
WE = "L"
RE = "L"
n-1 cycle
n cycle
n+m cycle
m cycle
n+m+4 cycle
n+m+1 cycle n+m+2 cycle n+m+3 cycle
n-m-1cycle
n-m-2 cycle
n cycle
n+1 cycle
n+2 cycle
n-m cycle
WCK
Dn
(n+m)
(n+m+4)
(n+m+1)
(n+2)
t
AC
t
OH
(n+1)
Qn
t
DS
t
DH
RCK
(n)
(n-m-3)
(n-m-2)
(n-m)
(n-m-1)
(n+m+2)
(n-1)
(n+m+3)
(n)
Please secure m
16 interval cycles also in the timing which a write
cycle and a read cycle approach most.
n-m-3 cycle
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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