參數(shù)資料
型號: M66287FP
廠商: Mitsubishi Electric Corporation
英文描述: 262144-word x 8-bit x 3-FIELD MEMORY
中文描述: 262144字× 8位× 3場記憶
文件頁數(shù): 19/21頁
文件大?。?/td> 196K
代理商: M66287FP
MITSUBISHI <DIGITAL ASSP>
M66287FP
262144-word x 8-bit x 3-FIELD MEMORY
2002 MITSUBISHI ELECTRIC CORPORATION
19
VARIABLE LENGTH DELAY BITS
z
1-LINE (262144-BIT) DELAY
In read cycles, an output data is read at the (first) rising edge of RCK start the cycle. In write cycles, an input data is written
at the (second) rising edge of WCK end the cycle. So 1-line delay can be made easily according to the control method of
the following figure.
Reset cycle
0 cycle
1 cycle
2 cycle
262142
cycle
WCK
RCK
WRES
RRES
Dn
WE, RE = "L"
(0’)
(1’)
(2’)
t
RESS
t
RESH
(0)
(1)
(2)
(262141)
(262142)
(0’)
(1’)
(2’)
(262143)
t
DS
t
DH
(0)
(1)
(2)
t
AC
t
OH
Qn
t
DS
t
DH
262143
cycle
262144
cycle
262145
cycle
262146
cycle
262144 cycle
z
N-BIT DELAY 1
(Reset at a cycle corresponding to delay length)
Reset cycle
0 cycle
1 cycle
2 cycle
n cycle
WCK
RCK
WRES
RRES
Dn
262144
n
16
WE, RE = "L"
(0’)
(1’)
(2’)
t
RESS
t
RESH
(0)
(1)
(2)
(n-1)
(n)
(0’)
(1’)
(2’)
t
DS
t
DH
(0)
(1)
(2)
t
AC
t
OH
Qn
t
DS
t
DH
Reset cycle
0 cycle
1 cycle
2 cycle
Delay length n
t
RESS
t
RESH
Note : The intervals of 16 cycles or more between a write cycle and a read cycle should be secured to read data
written in a certain cycle.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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