參數(shù)資料
型號: M66596FP
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 0.50 MM PITCH, LQFP-64
文件頁數(shù): 105/131頁
文件大?。?/td> 1595K
代理商: M66596FP
M66596FP/WG
rev .1.00
2006.3.14
page 75 of 127
3.3.6 Data PID sequence bit
The controller toggles the data PID sequence bit when data is transferred normally. Next, the sequence bit of
the data PID that was sent can be used to confirm the SQMON bit of the DCPCTR register and the PIPExCTR
register. When data is sent, the sequence bit switches at the timing at which the ACK handshake is received,
and when data is received, the sequence bit switches at the timing at which the ACK handshake is sent. Also,
the SQCLR bit and the SQSET bit of the DCPCTR register and the PIPExCTR register can be used to change the
data PID sequence bit.
In control transfer of Peripheral mode, this controller sets up a sequence bit automatically at the time of stage
changes. It is set to DATA0 at the setup stage end, and it answers by DATA1 on a status stage. A set up
sequence bit by software is not required. In control transfer of Host mode, it is necessary to set up a sequence bit
by software at the stage changes.
Even when which of Host and Peripheral is chosen, after ClearFeature request etc. needs to set up a data PID
sequence bit by software.
With pipes for which isochronous transfer has been set, sequence bit operation cannot be carried out using the
SQSET
bit.
3.3.7 Auto NAK function
The controller has a function that disables pipe operation (“Response PID=NAK”) at the timing at which the
final data packet of a transaction is received (the controller automatically distinguishes this based on reception
of a short packet or the transaction counter) by setting the SHTNAK bit of the PIPECFG register to “1”.
When a double buffer is being used for the buffer memory, using this function enables reception of data
packets in transfer units. Also, if pipe operation has been disabled, the pipe has to be set to the enabled state
again (“Response PID=BUF”) using software.
This function can be used for operation only when using bulk transfers.
相關PDF資料
PDF描述
M68HC11D3CFB1 8-BIT, MROM, 1 MHz, MICROCONTROLLER, PQFP44
M68HC711D0CFN 8-BIT, 2 MHz, MICROCONTROLLER, PQCC44
M68HC711D0CFB 8-BIT, 2 MHz, MICROCONTROLLER, PQFP44
M68HC711D3CFB1 8-BIT, MROM, 1 MHz, MICROCONTROLLER, PQFP44
M68HC711D3CP1 8-BIT, MROM, 1 MHz, MICROCONTROLLER, PDIP40
相關代理商/技術參數(shù)
參數(shù)描述
M66596FP#RB0Z 制造商:Renesas Electronics Corporation 功能描述:MCU - Trays 制造商:Renesas Electronics 功能描述:USB Device Controller 64-Pin LQFP Cut Tape 制造商:Renesas Electronics 功能描述:USB Device Controller 64-Pin LQFP Tray 制造商:Renesas 功能描述:USB Device Controller 64-Pin LQFP
M66596FPRB0Z 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Dual Function Controller,LQFP64
M66596WG 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Dual Function Controller)
M66596WG#RB0Z 制造商:Renesas Electronics 功能描述:Tray 制造商:Renesas 功能描述:0
M6668 制造商:Tamura Corporation of America 功能描述: