參數(shù)資料
型號(hào): M66596FP
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 0.50 MM PITCH, LQFP-64
文件頁數(shù): 33/131頁
文件大?。?/td> 1595K
代理商: M66596FP
REVISION HISTORY
M66596 Data Sheet
Description
Rev.
Date
Page
Summary
0.79
2004.07.7
-
First edition issued
0.79A
2004.07.21
6
52
52-53
53
Change *3), *5), *6) of Table 1.1
Change INDEX of Table 3.1
Change INDEX of Table 3.2
Change note *2) --> *1) of Table 3.2
Delete note *3) of Table 3.2
4
(1.3)
Added:
Figure 1.2
5
(1.4)
Modified:
“Table 1.1 describes the controller pins.”
9
(1.6)
Modified:
“The controller is configured with an analog front end unit (AFE),”
12
(2.1)
Corrected:
Addr 0x6C “Pipe period control register”
13-14
(2.2)
Added:
Addr 0x32 “BRDYM”, “PCSE”
Addr 0x70 – 0x78 “INBUFM”
15-45
(2.3-2.14)
Added and corrected : Refernce to chaptor 2 and 3 in noteof table.
Corrected: Note *1)
15
(2.3)
Added: “or clock stop state”
Corrected: Note *1)
19
(2.4.1)
Modified: “Each bit of the DVSTCTR register”
Added: “According to the USB specification, USB idle state…”
20
(2.5)
Modified: Note *1)
22
(2.5.2)
Modified: “Table 2.7 and Table 2.8 show the byte Endian operation…”
23
25(2.6)
Corrected: Note 5, 6, 7, 8
Corrected: Note *7)
28
(2.7)
Added: PCSE and BRDYM bits
Added: Note *3), *4)
40
(2.13)
Corrected: PID bit
Modified: Note *5)
42-45
(2.14)
Corrected: Note *4), *5), *6), *7)
Corrected: Default value of bit6 of PIPEMAXP
Corrected and added: Note *12), *13), *14), *15)
104
(4)
Moved: Chaptor3 to Chaptor4
105,106
(4.3,4.4)
Corrected:
Average supply current at HS operation; 60mA to 40mA.
0.80
2004.10.5
51
(3)
Added: Chaptor 3 Description of Operation
7
(1.7)
Added: 1.7
1.00
2006.3.14
17
(2.2)
Corrected: Addr 0x68, 0x6A
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