參數(shù)資料
型號: MAX1358BETL+W
廠商: Maxim Integrated Products
文件頁數(shù): 18/71頁
文件大小: 0K
描述: DAS 16BIT DUAL 10:1 40-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
類型: 數(shù)據(jù)采集系統(tǒng)(DAS)
分辨率(位): 16 b
采樣率(每秒): 21.94k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
電壓電源: 模擬和數(shù)字
電源電壓: 1.8 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-TQFN-EP(6x6)
包裝: 托盤
MAX1358B
16-Bit, Data-Acquisition System with ADC, DACs,
UPIOs, RTC, Voltage Monitors, and Temp Sensor
______________________________________________________________________________________
25
PIN
NAME
FUNCTION
23
SWA
DACA SPST Shunt Switch Input. Connects to OUTA through an SPST switch.
24
FBA
DACA Force-Sense Feedback Input. Analog input to mux.
25
OUTA
DACA Force-Sense Output. Analog input to mux.
26
AGND
Analog Ground
27
AVDD
Analog Supply Voltage. Also ADC reference voltage during AVDD measurement. Bypass to AGND with
10μF and 0.1μF capacitors in parallel as close to the pin as possible.
28
SWB
DACB SPST Shunt Switch Input. Connects to OUTB through an SPST switch.
29
FBB
DACB Force-Sense Feedback Input. Analog input to mux.
30
OUTB
Force-Sense DACB Ouput. Analog input to mux.
31
AIN2
Analog Input 2. Analog input to mux. Inputs have internal programmable current source for external
temperature measurement.
32
AIN1
Analog Input 1. Analog input to mux. Inputs have internal programmable current source for external
temperature measurement.
33
REF
Reference Input/Output. Output of the reference buffer amplifier or external reference input. Disabled at
power-up to allow external reference. Reference voltage for ADC and DACs.
34
REG
Linear Voltage-Regulator Output. Charge-pump-doubler input voltage. Bypass REG with a 10μF capacitor
to DGND for charge-pump regulation.
35
CF-
36
CF+
Charge-Pump Flying Capacitor Terminals. Connect an external 10μF (typ) capacitor between CF+ and CF-.
37
CPOUT
Charge-Pump Output. Connect an external 10μF (typ) reservoir capacitor between CPOUT and DGND. There is
a low threshold diode between DVDD and CPOUT. When the charge pump is disabled, CPOUT is pulled up
within 300mV (typ) of DVDD.
38
DVDD
Digital Supply Voltage. Bypass to DGND with 10μF and 0.1μF capacitors in parallel as close to the pin as
possible.
39
DGND
Digital Ground. Also ground for cascaded linear voltage regulator and charge-pump doubler.
40
UPIO1
User-Programmable Input/Output 1. See the UPIO1_CTRL Register for functionality.
EP
Exposed Pad. Leave unconnected or connect to AGND.
Pin Description (continued)
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