參數(shù)資料
型號(hào): MAX1441GUP/V+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 16/41頁(yè)
文件大小: 0K
描述: IC PROXMITY SENSOR 2CH 20-TSSOP
其它有關(guān)文件: Automotive Product Guide
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 74
類(lèi)型: 觸控式傳感器
輸入類(lèi)型: 數(shù)字
輸出類(lèi)型: 數(shù)字
接口: JTAG,串行
電流 - 電源: 100µA
安裝類(lèi)型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
MAX1441
Automotive, Two-Channel Proximity and
Touch Sensor
23
Table 11. Special-Function Register Bit Description (continued)
REGISTER
DESCRIPTION
EIE0 (02h, 00h)
External Interrupt Enable 0 Register (8-Bit Register)
Initialization
This register is cleared to 00h on all forms of reset.
Read/Write Access
Unrestricted read/write.
EIE0[2:0]–EX[2:0]
Enable External Interrupt Bits [2:0]. Setting any of these bits to 1 enables the corresponding external
interrupt, INTx. Clearing any of the bits to 0 disables the corresponding interrupt function.
EIE0[7:3]
Reserved. Read returns 0.
EIES0 (03h, 00h)
External Interrupt Edge Select 0 Register (8-Bit Register)
Initialization
This register is cleared to 00h on all forms of reset.
Read/Write Access
Unrestricted read/write.
EIES0[2:0]–IT[2:0]
Edge Select for External Interrupt Bits [2:0]:
ITx = 0 – External Interrupt INTx is positive edge triggered.
ITx = 1 – External Interrupt INTx is negative edge triggered.
EIS0[7:3]
Reserved. Read returns 0.
TCON (04h, 00h)
Timer Control Register (8-Bit Register)
Initialization
This register is cleared to 00h on all forms of reset.
Read/Write Access
Unrestricted read. Write is unrestricted, unless otherwise stated in the following bit description.
TCON[2:0]–TPSS[2:0]
Timer Prescaler Select Bits [2:0]. The following bits select the prescaler value that apply to the select
source clock.
TPSS[2:0]
PRESCALE VALUE
000
/1
001
/4
010
/16
011
/64
100
/256
101
/512
110
/1024
111
/2048
These bits can only be written to when the timer is disabled (TMREN = 0).
TCON.3–TCLK
Timer Clock Select. This bit selects the clock source used by the Timer. When this bit is cleared to 0,
the system clock is used as the clock source. When this bit is set to 1, the 32kHz is used.
This bit can only be written to when the timer is disabled (TMREN = 0).
TCON.4–TMREN
Timer Enable. Setting this bit to 1 enables the Timer. Clearing this bit halts the Timer. The Timer contin-
ues to run in Stop mode if TMREN = 1.
TCON.5–TVALID
Timer Value Valid. This bit indicates whether TCNT returns the valid value when 32kHz is selected as
the clock source. When this bit is set to 1, TCNT returns the valid value. When this bit is cleared to 0,
TCNT returns 0000h.
This bit has no meaning when the system clock is used as a clock source. In this case, TCNT always
returns valid value.
TCON.6–TMRIF
Timer Interrupt Flag. This bit is set to 1 when the Timer count matches the timer frequency value. It is
cleared either by software or a reset. A 0 on this bit indicates no Timer overflow has been detected.
TCON.7–TMRIE
Timer Interrupt Enable. Setting this bit to 1 enables the Timer interrupt. Clearing this bit to 0 disables
the Timer interrupt.
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