參數(shù)資料
型號(hào): MC56F8356VFV60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 56F8356 16-bit Hybrid Controller
中文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝: LQFP-144
文件頁數(shù): 138/160頁
文件大?。?/td> 1380K
代理商: MC56F8356VFV60
138
56F8356 Technical Data
Preliminary
10.10 Serial Peripheral Interface (SPI) Timing
Table 10-18 SPI Timing
1
1.
Parameters listed are guaranteed by design.
Characteristic
Symbol
Min
Max
Unit
See Figure
Cycle time
Master
Slave
t
C
50
50
ns
ns
10-10
,
10-11
,
10-12
,
10-13
Enable lead time
Master
Slave
t
ELD
25
ns
ns
10-13
Enable lag time
Master
Slave
t
ELG
100
ns
ns
10-13
Clock (SCK) high time
Master
Slave
t
CH
17.6
25
ns
ns
10-10
,
10-11
,
10-12
,
10-13
Clock (SCK) low time
Master
Slave
t
CL
24.1
25
ns
ns
10-13
Data set-up time required for inputs
Master
Slave
t
DS
20
0
ns
ns
10-10
,
10-11
,
10-12
,
10-13
Data hold time required for inputs
Master
Slave
t
DH
0
2
ns
ns
10-10
,
10-11
,
10-12
,
10-13
Access time (time to data active from
high-impedance state)
Slave
t
A
4.8
15
ns
10-13
Disable time (hold time to high-impedance state)
Slave
t
D
3.7
15.2
ns
10-13
Data Valid for outputs
Master
Slave (after enable edge)
t
DV
4.5
20.4
ns
ns
10-10
,
10-11
,
10-12
,
10-13
Data invalid
Master
Slave
t
DI
0
0
ns
ns
10-10
,
10-11
,
10-12
Rise time
Master
Slave
t
R
11.5
10.0
ns
ns
10-10
,
10-11
,
10-12
,
10-13
Fall time
Master
Slave
t
F
9.7
9.0
ns
ns
10-10
,
10-11
,
10-12
,
10-13
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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