參數(shù)資料
型號: MC56F8356VFV60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 56F8356 16-bit Hybrid Controller
中文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝: LQFP-144
文件頁數(shù): 143/160頁
文件大?。?/td> 1380K
代理商: MC56F8356VFV60
Controller Area Network (CAN) Timing
56F8356 Technical Data
Preliminary
143
10.14 Controller Area Network (CAN) Timing
Figure 10-18 Bus Wake Up Detection
10.15 JTAG Timing
Table 10-22 CAN Timing
1
1.
Parameters listed are guaranteed by design
Characteristic
Symbol
Min
Max
Unit
See Figure
Baud Rate
BR
CAN
1
Mbps
Bus Wake Up detection
T
WAKEUP
5
μ
s
10-18
Table 10-23 JTAG Timing
Characteristic
Symbol
Min
Max
Unit
See Figure
TCK frequency of operation using
EOnCE
1
1.
TCK frequency of operation must be less than 1/8 the processor rate.
f
OP
DC
SYS_CLK/8
MHz
10-19
TCK frequency of operation not
using EOnCE
1
f
OP
DC
SYS_CLK/4
MHz
10-19
TCK clock pulse width
t
PW
50
ns
10-19
TMS, TDI data set-up time
t
DS
5
ns
10-20
TMS, TDI data hold time
t
DH
5
ns
10-20
TCK low to TDO data valid
t
DV
30
ns
10-20
TCK low to TDO tri-state
t
TS
30
ns
10-20
TRST assertion time
t
TRST
2T
2
2.
T = processor clock period (nominally 1/60MHz)
ns
10-21
T
WAKEUP
CAN_RX
CAN receive
data pin
(Input)
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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