參數(shù)資料
型號(hào): MC56F8356VFV60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 56F8356 16-bit Hybrid Controller
中文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝: LQFP-144
文件頁數(shù): 18/160頁
文件大?。?/td> 1380K
代理商: MC56F8356VFV60
18
56F8356 Technical Data
Preliminary
D0
(GPIOF9)
59
Input/
Output
Input/
Output
Tri-stated
Input
Data Bus
D0 - D6 specify part of the data for external
program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), D0 - D6 are tri-stated when the
external bus is inactive.
Port F GPIO
— These seven GPIO pins can be
individually programmed as input or output pins.
At reset, these pins default to the EMI Data bus function.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOF_PUR register.
Example: GPIOF9, clear bit 9 in the GPIOF_PUR register.
D1
(GPIOF10)
60
D2
(GPIOF11)
72
D3
(GPIOF12)
75
D4
(GPIOF13)
76
D5
(GPIOF14)
77
D6
(GPIOF15)
78
D7
(GPIOF0)
28
Input/
Output
Input/
Output
Tri-stated
Input
Data Bus
— D7 - D14 specify part of the data for external
program or data memory accesses.
Port F GPIO
— These eight GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to data bus functionality.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOF_PUR register.
Example: GPIOF0, clear bit 0 in the GPIOF_PUR register.
D8
(GPIOF1)
29
D9
(GPIOF2)
30
D10
(GPIOF3)
32
D11
(GPIOF4)
133
D12
(GPIOF5)
134
D13
(GPIOF6)
135
D14
(GPIOF7)
136
Table 2-2 56F8356 Signal and Package Information for the 144-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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MC56F8356MFV60 56F8356 16-bit Hybrid Controller
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