參數(shù)資料
型號: MC56F8356VFV60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 56F8356 16-bit Hybrid Controller
中文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝: LQFP-144
文件頁數(shù): 59/160頁
文件大?。?/td> 1380K
代理商: MC56F8356VFV60
Peripheral Memory Mapped Registers
56F8356 Technical Data
Preliminary
59
Table 4-31 GPIOC Registers Address Map
(GPIOC_BASE = $00
F310)
Register Acronym
Address Offset
Register Description
Reset Value
GPIOC_PUR
$0
Pull-up Enable Register
0 x 07FF
GPIOC_DR
$1
Data Register
0 x 0000
GPIOC_DDR
$2
Data Direction Register
0 x 0000
GPIOC_PER
$3
Peripheral Enable Register
0 x 07FF
GPIOC_IAR
$4
Interrupt Assert Register
0 x 0000
GPIOC_IENR
$5
Interrupt Enable Register
0 x 0000
GPIOC_IPOLR
$6
Interrupt Polarity Register
0 x 0000
GPIOC_IPR
$7
Interrupt Pending Register
0 x 0000
GPIOC_IESR
$8
Interrupt Edge-Sensitive Register
0 x 0000
GPIOC_PPMODE
$9
Push-Pull Mode Register
0 x 07FF
GPIOC_RAWDATA
$A
Raw Data Input Register
Table 4-32 GPIOD Registers Address Map
(GPIOD_BASE = $00 F320)
Register Acronym
Address Offset
Register Description
Reset Value
GPIOD_PUR
$0
Pull-up Enable Register
0 x 1FFF
GPIOD_DR
$1
Data Register
0 x 0000
GPIOD_DDR
$2
Data Direction Register
0 x 0000
GPIOD_PER
$3
Peripheral Enable Register
0 x 1FC0
GPIOD_IAR
$4
Interrupt Assert Register
0 x 0000
GPIOD_IENR
$5
Interrupt Enable Register
0 x 0000
GPIOD_IPOLR
$6
Interrupt Polarity Register
0 x 0000
GPIOD_IPR
$7
Interrupt Pending Register
0 x 0000
GPIOD_IESR
$8
Interrupt Edge-Sensitive Register
0 x 0000
GPIOD_PPMODE
$9
Push-Pull Mode Register
0 x 1FFF
GPIOD_RAWDATA
$A
Raw Data Input Register
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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