參數(shù)資料
型號： MC56F8356VFV60
廠商： MOTOROLA INC
元件分類： 數(shù)字信號處理
英文描述： 56F8356 16-bit Hybrid Controller
中文描述： 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝： LQFP-144
文件頁數(shù)： 68/160頁
文件大?。?/td> 1380K
代理商： MC56F8356VFV60
68
56F8356 Technical Data
Preliminary
Part 5 Interrupt Controller (ITCN)
5.1 Introduction
The Interrupt Controller (ITCN) module is used to arbitrate between various interrupt requests
(IRQs), to signal to the 56800E core when an interrupt of sufficient priority exists, and to what
address to jump in order to service this interrupt.
5.2 Features
The ITCN module design includes these distinctive features:
Programmable priority levels for each IRQ
Two programmable Fast Interrupts
Notification to SIM module to restart clocks out of Wait and Stop modes
Drives initial address on the address bus after reset
For further information, see
Table 4-5
, Interrupt Vector Table Contents.
5.3 Functional Description
The Interrupt Controller is a slave on the IPBus. It contains registers allowing each of the 82
interrupt sources to be set to one of four priority levels, excluding certain interrupts of fixed
priority. Next, all of the interrupt requests of a given level are priority encoded to determine the
lowest numerical value of the active interrupt requests for that level. Within a given priority level,
zero is the highest priority, while number 81 is the lowest.
5.3.1
Once the ITCN has determined that an interrupt is to be serviced and which interrupt has the
highest priority, an interrupt vector address is generated. Normal interrupt handling concatenates
the VBA and the vector number to determine the vector address. In this way, an offset is generated
into the vector table for each interrupt.
Normal Interrupt Handling
5.3.2
Interrupt exceptions may be nested to allow an IRQ of higher priority than the current exception to
be serviced. The following tables define the nesting requirements for each priority level.
Interrupt Nesting
Table 5-1 Interrupt Mask Bit Definition
SR[9]
1
1.
Core status register bits indicating current interrupt mask within the core.
SR[8]
1
Permitted Exceptions
Masked Exceptions
0
0
Priorities 0, 1, 2, 3
None
0
1
Priorities 1, 2, 3
Priority 0
1
0
Priorities 2, 3
Priorities 0, 1
1
1
Priority 3
Priorities 0, 1, 2
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC56F8356VFVE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 60MHz 60MIPS RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8357 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-BIT HYBRID CONTROLLERS
MC56F8357EVM 功能描述:KIT EVALUATION FOR MC56F8357 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產(chǎn)零件編號 系列:- 標準包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP
MC56F8357MPY60 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:16-bit Digital Signal Processor
MC56F8357MPYE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
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