參數(shù)資料
型號: MC56F8356VFV60
廠商: MOTOROLA INC
元件分類: 數(shù)字信號處理
英文描述: 56F8356 16-bit Hybrid Controller
中文描述: 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝: LQFP-144
文件頁數(shù): 29/160頁
文件大?。?/td> 1380K
代理商: MC56F8356VFV60
56F8356 Signal Pins
56F8356 Technical Data
Preliminary
29
IRQA
54
Schmitt
Input
Input
External Interrupt Request A and B
— The IRQA and
IRQB inputs are asynchronous external interrupt requests
during Stop and Wait mode operation. During other
operating modes, they are synchronized external interrupt
requests, which indicate an external device is requesting
service. They can be programmed to be level-sensitive or
negative-edge triggered.
To deactivate the internal pull-up resistor, set the IRQ bit in
the SIM_PUDR register. See
Section 6.5.6
for details.
IRQB
55
RESET
86
Schmitt
Input
Input
Reset
— This input is a direct hardware reset on the
processor. When RESET is asserted low, the device is
initialized and placed in the reset state. A Schmitt trigger
input is used for noise immunity. When the RESET pin is
deasserted, the initial chip operating mode is latched from
the EXTBOOT pin. The internal reset signal will be
deasserted synchronous with the internal clocks after a
fixed number of internal clocks.
To ensure complete hardware reset, RESET and TRST
should be asserted together. The only exception occurs in
a debugging environment when a hardware device reset is
required and the JTAG/EOnCE module must not be reset.
In this case, assert RESET but do not assert TRST.
Note:
The internal Power-On Reset will assert on initial
power-up.
To deactivate the internal pull-up resistor, set the RESET
bit in the SIM_PUDR register. See
Section 6.5.6
for
details.
RSTO
85
Output
Output
Reset Output
— This output reflects the internal reset
state of the chip.
EXTBOOT
112
Schmitt
Input
Input
External Boot
— This input is tied to V
DD
to force the
device to boot from off-chip memory (assuming that the
on-chip Flash memory is not in a secure state). Otherwise,
it is tied to ground. For details, see
Table 4-4
.
Note:
When this pin is tied low, the customer boot software
should disable the internal pull-up resistor by setting the
XBOOT bit of the SIM_PUDR; see
Section 6.5.6
.
Table 2-2 56F8356 Signal and Package Information for the 144-Pin LQFP
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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