參數(shù)資料
型號(hào): MC68HC05C9ECP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁(yè)數(shù): 14/106頁(yè)
文件大?。?/td> 659K
代理商: MC68HC05C9ECP
Functional Pin Descriptions
MC68HC05C9E Advance Information Data Sheet, Rev. 0.1
Freescale Semiconductor
15
Figure 1-4. 44-Pin QFP Pin Assignments
1.5.1 VDD and VSS
Power is supplied to the MCU using these two pins. VDD is the positive supply and VSS is ground.
1.5.2 IRQ
This interrupt pin has an option that provides two different choices of interrupt triggering sensitivity.
The IRQ pin contains an internal Schmitt trigger as part of its input to improve noise immunity. Refer to
Chapter 4 Interrupts for more detail.
1.5.3 OSC1 andOSC2
These pins provide control input for an on-chip clock oscillator circuit. A crystal or ceramic resonator
connected to these pins provides a system clock. The internal frequency is one-half the crystal frequency.
1.5.4 RESET
As an input pin, this active low RESET pin is used to reset the MCU to a known startup state by pulling
RESET low. As an output pin, the RESET pin indicates that an internal MCU reset has occurred. The
RESET pin contains an internal Schmitt trigger as part of its input to improve noise immunity. Refer to
Chapter 5 Resets for more detail.
33
32
31
30
29
28
27
26
25
24
23
PC3
PC2
PC1
PC0
PD0/RDI
PD1/TDO
PD2/MISO
PD3/MOSI
PD4/SCK
PD5/SS
TCMP
1
2
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
16
15
14
13
12
44
43
42
41
40
38
37
36
35
34
PD7
PC4
PC5
PC6
PC7
V
SS
N/
C
PB7
PB6
PB5
PB4
TCAP
OSC2
OSC1
V
DD
N/C
RESET
IRQ
N/C
PA
7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
PB0
PB1
PB2
PB3
39
N/
C
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