參數(shù)資料
型號： MC68HC05C9ECP
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁數(shù)： 55/106頁
文件大小： 659K
代理商： MC68HC05C9ECP
Serial Communications Interface (SCI)
MC68HC05C9E Advance Information Data Sheet, Rev. 0.1
52
Freescale Semiconductor
9.6 Data Format
Receive data or transmit data is the serial data that is transferred to the internal data bus from the receive
data input pin (RDI) or from the internal bus to the transmit data output pin (TDO). The non-return-to-zero
(NRZ) data format shown in Figure 9-3 is used and must meet these criteria:
The idle line is brought to a logic 1 state prior to transmission/ reception of a character.
A start bit (logic 0) is used to indicate the start of a frame.
The data is transmitted and received least significant bit first.
A stop bit (logic 1) is used to indicate the end of a frame. A frame consists of a start bit, a character
of eight or nine data bits, and a stop bit.
A break is defined as the transmission or reception of a low (logic 0) for at least one complete frame
time.
Figure 9-3. Data Format
9.7 Receiver Wakeup Operation
The receiver logic hardware also supports a receiver wakeup function which is intended for systems
having more than one receiver. With this function a transmitting device directs messages to an individual
receiver or group of receivers by passing addressing information as the initial byte(s) of each message.
The wakeup function allows receivers not addressed to remain in a dormant state for the remainder of the
unwanted message. This eliminates any further software overhead to service the remaining characters of
the unwanted message and thus improves system performance.
The receiver is placed in wakeup mode by setting the receiver wakeup bit (RWU) in the SCCR2 register.
While RWU is set, all of the receiver-related status flags (RDRF, IDLE, OR, NF, and FE) are inhibited
(cannot become set).
NOTE
The idle line detect function is inhibited while the RWU bit is set. Although
RWU may be cleared by a software write to SCCR2, it would be unusual to
do so.
Normally, RWU is set by software and is cleared automatically in hardware by one of these methods: idle
line wakeup or address mark wakeup.
9.7.1 Idle Line Wakeup
In idle line wakeup mode, a dormant receiver wakes up as soon as the RDI line becomes idle. Idle is
defined as a continuous logic high level on the RDI line for 10 (or 11) full bit times. Systems using this
type of wakeup must provide at least one character time of idle between messages to wake up sleeping
receivers, but must not allow any idle time between characters within a message.
IDLE LINE
012345678
0
STOP START
START
CONTROL BIT M SELECTS
8- OR 9-BIT DATA
相關PDF資料
PDF描述
MC68HC05CC2B 8-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDIP42
MC68HC05CJ4FB 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
MC68HC705CJ4FB 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
MC68HC05E0FN 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQCC68
MC68HC05E5P 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
相關代理商/技術參數(shù)
參數(shù)描述
MC68HC05CT4FB 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification
MC68HC05CT4FN 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification
MC68HC05D9 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-bit microcomputer with PWM outputs and LED drive
MC68HC05E0 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
MC68HC05E0FN 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*